CDCLVD2108 Series
Low jitter, dual 1:8 universal-to-LVDS buffer
Manufacturer: Texas Instruments
Link to Manufacturer Page: https://www.ti.com/
Catalog
Low jitter, dual 1:8 universal-to-LVDS buffer
| Part | Number of Circuits | Supplier Device Package | Operating Temperature [Min] | Operating Temperature [Max] | Output | Mounting Type | Frequency - Max [Max] | Differential - Input:Output [custom] | Differential - Input:Output [custom] | Voltage - Supply [Min] | Voltage - Supply [Max] | Type | Package / Case | Input | Ratio - Input:Output [custom] | Ratio - Input:Output [custom] |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Texas Instruments CDCLVD2108RGZR | 2 | 48-VQFN (7x7) | -40 °C | 85 °C | LVDS | Surface Mount | 800 MHz | 2.375 V | 2.625 V | Fanout Buffer (Distribution) | 48-VFQFN Exposed Pad | LVCMOS, LVDS, LVPECL | 1 | 8 | ||
Texas Instruments CDCLVD2108RGZT | 2 | 48-VQFN (7x7) | -40 °C | 85 °C | LVDS | Surface Mount | 800 MHz | 2.375 V | 2.625 V | Fanout Buffer (Distribution) | 48-VFQFN Exposed Pad | LVCMOS, LVDS, LVPECL | 1 | 8 |
Key Features
• Dual 1:8 Differential BufferLow Additive Jitter <300 fs RMS in10 kHz to 20 MHzLow Within Bank Output Skew of 50 ps (Max)Universal Inputs Accept LVDS, LVPECL, LVCMOSOne Input Dedicated for Eight OutputsTotal of 16 LVDS Outputs, ANSI EIA/TIA-644AStandard CompatibleClock Frequency up to 800 MHz2.375–2.625V Device Power SupplyLVDS Reference Voltage, VAC_REF,Available for Capacitive Coupled InputsIndustrial Temperature Range –40°C to 85°CPackaged in 7mm × 7mm 48-Pin QFN (RGZ)ESD Protection Exceeds 3 kV HBM, 1 kV CDMAPPLICATIONSTelecommunications/NetworkingMedical ImagingTest and Measurement EquipmentWireless CommunicationsGeneral Purpose ClockingDual 1:8 Differential BufferLow Additive Jitter <300 fs RMS in10 kHz to 20 MHzLow Within Bank Output Skew of 50 ps (Max)Universal Inputs Accept LVDS, LVPECL, LVCMOSOne Input Dedicated for Eight OutputsTotal of 16 LVDS Outputs, ANSI EIA/TIA-644AStandard CompatibleClock Frequency up to 800 MHz2.375–2.625V Device Power SupplyLVDS Reference Voltage, VAC_REF,Available for Capacitive Coupled InputsIndustrial Temperature Range –40°C to 85°CPackaged in 7mm × 7mm 48-Pin QFN (RGZ)ESD Protection Exceeds 3 kV HBM, 1 kV CDMAPPLICATIONSTelecommunications/NetworkingMedical ImagingTest and Measurement EquipmentWireless CommunicationsGeneral Purpose Clocking
Description
AI
The CDCLVD2108 clock buffer distributes two clock inputs (IN0, IN1) to a total of 16 pairs of differential LVDS clock outputs (OUT0, OUT15). Each buffer block consists of one input and 8 LVDS outputs. The inputs can either be LVDS, LVPECL, or LVCMOS.
The CDCLVD2108 is specifically designed for driving 50-transmission lines. In case of driving the inputs in single ended mode, the appropriate bias voltage (VAC_REF) should be applied to the unused negative input pin.
Using the control pin (EN) outputs can be either disabled or enabled. If the EN pin is left open all outputs are active, if switched to a logical "0" all outputs are disabled (static logical 0), if switched to a logical "1", OUT (8..15) are switched off and OUT (0..7) are active. The part supports a fail safe function. It incorporates an input hysteresis, which prevents random oscillation of the outputs in absence of an input signal.
The device operates in 2.5V supply environment and is characterized from –40°C to 85°C (ambient temperature). The CDCLVD2108 is packaged in small 48-pin, 7-mm × 7-mm QFN package.
The CDCLVD2108 clock buffer distributes two clock inputs (IN0, IN1) to a total of 16 pairs of differential LVDS clock outputs (OUT0, OUT15). Each buffer block consists of one input and 8 LVDS outputs. The inputs can either be LVDS, LVPECL, or LVCMOS.
The CDCLVD2108 is specifically designed for driving 50-transmission lines. In case of driving the inputs in single ended mode, the appropriate bias voltage (VAC_REF) should be applied to the unused negative input pin.
Using the control pin (EN) outputs can be either disabled or enabled. If the EN pin is left open all outputs are active, if switched to a logical "0" all outputs are disabled (static logical 0), if switched to a logical "1", OUT (8..15) are switched off and OUT (0..7) are active. The part supports a fail safe function. It incorporates an input hysteresis, which prevents random oscillation of the outputs in absence of an input signal.
The device operates in 2.5V supply environment and is characterized from –40°C to 85°C (ambient temperature). The CDCLVD2108 is packaged in small 48-pin, 7-mm × 7-mm QFN package.