ADC12C105 Series
12-Bit, 105-MSPS, 1.0-GHz Input Bandwidth Analog-to-Digital Converter (ADC)
Manufacturer: Texas Instruments
Catalog(1 parts)
| Part | Number of Bits▲▼ | Data Interface | Number of Inputs▲▼ | Supplier Device Package | Architecture | Ratio - S/H:ADC | Reference Type | Number of A/D Converters▲▼ | Voltage - Supply, Analog▲▼ | Voltage - Supply, Analog▲▼ | Input Type | Configuration | Operating Temperature▲▼ | Operating Temperature▲▼ | Voltage - Supply, Digital▲▼ | Voltage - Supply, Digital▲▼ | Mounting Type | Sampling Rate (Per Second)▲▼ |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Texas Instruments ADC12C105CISQ/NOPB12 Bit Analog to Digital Converter 1 Input 1 Pipelined 32-WQFN (5x5) | 12 ul | Parallel | 1 ul | 32-WQFN (5x5) | Pipelined | 1:1 | External, Internal | 1 ul | 2.700000047683716 V | 3.5999999046325684 V | Differential | S/H-ADC | -40 °C | 85 °C | 3.5999999046325684 V | 2.4000000953674316 V | Surface Mount | 105 m |
Key Features
• 1 GHz Full Power BandwidthInternal Reference and Sample-and-Hold CircuitLow Power ConsumptionData Ready Output ClockClock Duty Cycle StabilizerSingle +3.0V or +3.3V Supply OperationPower-Down Mode32-Pin WQFN Package, (5x5x0.8mm, 0.5mm Pin-Pitch)Key SpecificationsResolution: 12 BitsConversion Rate: 105 MSPSSNR: (fIN= 240 MHz) 69 dBFS (typ)SFDR: (fIN= 240 MHz) 82 dBFS (typ)Full Power Bandwidth: 1 GHz (typ)Power Consumption:350 mW (typ), VA=3.0 V400 mW (typ), VA=3.3 VAll trademarks are the property of their respective owners.1 GHz Full Power BandwidthInternal Reference and Sample-and-Hold CircuitLow Power ConsumptionData Ready Output ClockClock Duty Cycle StabilizerSingle +3.0V or +3.3V Supply OperationPower-Down Mode32-Pin WQFN Package, (5x5x0.8mm, 0.5mm Pin-Pitch)Key SpecificationsResolution: 12 BitsConversion Rate: 105 MSPSSNR: (fIN= 240 MHz) 69 dBFS (typ)SFDR: (fIN= 240 MHz) 82 dBFS (typ)Full Power Bandwidth: 1 GHz (typ)Power Consumption:350 mW (typ), VA=3.0 V400 mW (typ), VA=3.3 VAll trademarks are the property of their respective owners.
Description
AI
The ADC12C105 is a high-performance CMOS analog-to-digital converter capable of converting analog input signals into 12-bit digital words at rates up to 105 Mega Samples Per Second (MSPS). This converter uses a differential, pipelined architecture with digital error correction and an on-chip sample-and-hold circuit to minimize power consumption and the external component count, while providing excellent dynamic performance. A unique sample-and-hold stage yields a full-power bandwidth of 1 GHz. The ADC12C105 may be operated from a single +3.0V or +3.3V power supply and consumes low power.
A separate +2.5V supply may be used for the digital output interface which allows lower power operation with reduced noise. A power-down feature reduces the power consumption to very low levels while still allowing fast wake-up time to full operation. The differential inputs accept a 2V full scale differential input swing. A stable 1.2V internal voltage reference is provided, or the ADC12C105 can be operated with an external 1.2V reference. Output data format (offset binary versus 2's complement) and duty cycle stabilizer are pin-selectable. The duty cycle stabilizer maintains performance over a wide range of clock duty cycles.
The ADC12C105 is available in a 32-lead WQFN package and operates over the industrial temperature range of −40°C to +85°C.
The ADC12C105 is a high-performance CMOS analog-to-digital converter capable of converting analog input signals into 12-bit digital words at rates up to 105 Mega Samples Per Second (MSPS). This converter uses a differential, pipelined architecture with digital error correction and an on-chip sample-and-hold circuit to minimize power consumption and the external component count, while providing excellent dynamic performance. A unique sample-and-hold stage yields a full-power bandwidth of 1 GHz. The ADC12C105 may be operated from a single +3.0V or +3.3V power supply and consumes low power.
A separate +2.5V supply may be used for the digital output interface which allows lower power operation with reduced noise. A power-down feature reduces the power consumption to very low levels while still allowing fast wake-up time to full operation. The differential inputs accept a 2V full scale differential input swing. A stable 1.2V internal voltage reference is provided, or the ADC12C105 can be operated with an external 1.2V reference. Output data format (offset binary versus 2's complement) and duty cycle stabilizer are pin-selectable. The duty cycle stabilizer maintains performance over a wide range of clock duty cycles.
The ADC12C105 is available in a 32-lead WQFN package and operates over the industrial temperature range of −40°C to +85°C.