65LVDT101 Series

2-Gbps LVDS, LVPECL & CML to LVPECL repeater/translator

Catalog(2 parts)

Part	Current - Supply▲▼	Delay Time▲▼	Package / Case▲▼	Package / Case	Voltage - Supply▲▼	Voltage - Supply▲▼	Data Rate (Max)▲▼	Type	Number of Channels▲▼	Supplier Device Package	Capacitance - Input▲▼	Operating Temperature▲▼	Operating Temperature▲▼	Mounting Type	Output	Package / Case▲▼
Texas Instruments SN65LVDT101DG4 Buffer, ReDriver 1 Channel 2Gbps 8-SOIC	0.05000000074505806 A	6.299999966152824e-10 s	0.003899999894201755 m	8-SOIC	3.5999999046325684 V	3 V	2147483648 bit/s	Buffer, ReDriver	1 ul	8-SOIC	5.99999975918475e-13 F	-40 °C	85 °C	Surface Mount	LVPECL
Texas Instruments SN65LVDT101DGKR Buffer, ReDriver 1 Channel 2Gbps 8-VSSOP	0.05000000074505806 A	6.299999966152824e-10 s	0.0029972000047564507 m	8-MSOP, 8-TSSOP	3.5999999046325684 V	3 V	2147483648 bit/s	Buffer, ReDriver	1 ul		5.99999975918475e-13 F	-40 °C	85 °C	Surface Mount	LVPECL	0.003000000026077032 m

Key Features

• Designed for Signaling Rates ≥ 2 GbpsTotal Jitter < 65 psLow-Power Alternative for the MC100EP16Low 100-ps (Maximum) Part-to-Part Skew25 mV of Receiver Input Threshold HysteresisOver 0-V to 4-V Input Voltage RangeInputs Electrically Compatible With LVPECL,CML, and LVDS Signal Levels3.3-V Supply OperationLVDT Integrates 110-Ω Terminating ResistorOffered in SOIC and MSOPDesigned for Signaling Rates ≥ 2 GbpsTotal Jitter < 65 psLow-Power Alternative for the MC100EP16Low 100-ps (Maximum) Part-to-Part Skew25 mV of Receiver Input Threshold HysteresisOver 0-V to 4-V Input Voltage RangeInputs Electrically Compatible With LVPECL,CML, and LVDS Signal Levels3.3-V Supply OperationLVDT Integrates 110-Ω Terminating ResistorOffered in SOIC and MSOP

Description

The SN65LVDS100, SN65LVDT100, SN65LVDS101, and SN65LVDT101 are high-speed differential receivers and drivers connected as repeaters. The receiver accepts low-voltage differential signaling (LVDS), positive-emitter-coupled logic (PECL), or current-mode logic (CML) input signals at rates up to 2 Gbps and repeats it as either an LVDS or PECL output signal. The signal path through the device is differential for low radiated emissions and minimal added jitter. The outputs of the SN65LVDS100 and SN65LVDT100 are LVDS levels as defined by TIA/EIA-644-A. The outputs of the SN65LVDS101 and SN65LVDT101 are compatible with 3.3-V PECL levels. Both drive differential transmission lines with nominally 100-Ω characteristic impedance. The SN65LVDT100 and SN65LVDT101 include a 110-Ω differential line termination resistor for less board space, fewer components, and the shortest stub length possible. They do not include the VBBvoltage reference found in the SN65LVDS100 and SN65LVDS101. VBBprovides a voltage reference of typically 1.35 V below VCCfor use in receiving single-ended input signals and is particularly useful with single-ended 3.3-V PECL inputs. When VBBis not used, it should be unconnected or open. All devices are characterized for operation from –40°C to 85°C. The SN65LVDS100, SN65LVDT100, SN65LVDS101, and SN65LVDT101 are high-speed differential receivers and drivers connected as repeaters. The receiver accepts low-voltage differential signaling (LVDS), positive-emitter-coupled logic (PECL), or current-mode logic (CML) input signals at rates up to 2 Gbps and repeats it as either an LVDS or PECL output signal. The signal path through the device is differential for low radiated emissions and minimal added jitter. The outputs of the SN65LVDS100 and SN65LVDT100 are LVDS levels as defined by TIA/EIA-644-A. The outputs of the SN65LVDS101 and SN65LVDT101 are compatible with 3.3-V PECL levels. Both drive differential transmission lines with nominally 100-Ω characteristic impedance. The SN65LVDT100 and SN65LVDT101 include a 110-Ω differential line termination resistor for less board space, fewer components, and the shortest stub length possible. They do not include the VBBvoltage reference found in the SN65LVDS100 and SN65LVDS101. VBBprovides a voltage reference of typically 1.35 V below VCCfor use in receiving single-ended input signals and is particularly useful with single-ended 3.3-V PECL inputs. When VBBis not used, it should be unconnected or open. All devices are characterized for operation from –40°C to 85°C.