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74LVC1G79 Series

Single Positive-Edge-Triggered D-Type Flip-Flop

Manufacturer: Texas Instruments

Catalog(10 parts)

PartNumber of ElementsMax Propagation Delay @ V, Max CLInput CapacitanceOutput TypeTrigger TypeClock FrequencyOperating TemperatureOperating TemperatureTypeFunctionCurrent - Quiescent (Iq)Mounting TypeCurrent - Output High, LowCurrent - Output High, LowVoltage - SupplyVoltage - SupplyNumber of Bits per ElementSupplier Device PackagePackage / CaseQualificationGrade
Texas Instruments
SN74LVC1G79DCKR
Flip Flop 1 Element D-Type 1 Bit Positive Edge 5-TSSOP, SC-70-5, SOT-353
1 ul
4.4999999282424605e-9 s
3.999999984016789e-12 F
Non-Inverted
Positive Edge
160000000 Hz
-40 °C
125 °C
D-Type
Standard
0.000009999999747378752 A
Surface Mount
0.03200000151991844 A
0.03200000151991844 A
5.5 V
1.649999976158142 V
1 ul
SC-70-5
5-TSSOP, SC-70-5, SOT-353
Texas Instruments
SN74LVC1G79DBVT
Flip Flop 1 Element D-Type 1 Bit Positive Edge SC-74A, SOT-753
1 ul
4.4999999282424605e-9 s
3.999999984016789e-12 F
Non-Inverted
Positive Edge
160000000 Hz
-40 °C
125 °C
D-Type
Standard
0.000009999999747378752 A
Surface Mount
0.03200000151991844 A
0.03200000151991844 A
5.5 V
1.649999976158142 V
1 ul
SOT-23-5
SC-74A, SOT-753
Texas Instruments
SN74LVC1G79QDCKTQ1
Flip Flop 1 Element D-Type 1 Bit Positive Edge 5-TSSOP, SC-70-5, SOT-353
1 ul
4.999999969612645e-9 s
3.999999984016789e-12 F
Non-Inverted
Positive Edge
160000000 Hz
-40 °C
125 °C
D-Type
Standard
0.000009999999747378752 A
Surface Mount
0.03200000151991844 A
0.03200000151991844 A
5.5 V
1.649999976158142 V
1 ul
SC-70-5
5-TSSOP, SC-70-5, SOT-353
AEC-Q100
Automotive
Texas Instruments
SN74LVC1G79DBVR
Flip Flop 1 Element D-Type 1 Bit Positive Edge SC-74A, SOT-753
1 ul
4.4999999282424605e-9 s
3.999999984016789e-12 F
Non-Inverted
Positive Edge
160000000 Hz
-40 °C
125 °C
D-Type
Standard
0.000009999999747378752 A
Surface Mount
0.03200000151991844 A
0.03200000151991844 A
5.5 V
1.649999976158142 V
1 ul
SOT-23-5
SC-74A, SOT-753
Texas Instruments
SN74LVC1G79WDCKREP
Flip Flop 1 Element D-Type 1 Bit Positive Edge 5-TSSOP, SC-70-5, SOT-353
1 ul
4.4999999282424605e-9 s
3.999999984016789e-12 F
Non-Inverted
Positive Edge
160000000 Hz
-55 °C
115 °C
D-Type
Standard
0.000009999999747378752 A
Surface Mount
0.03200000151991844 A
0.03200000151991844 A
5.5 V
1.649999976158142 V
1 ul
SC-70-5
5-TSSOP, SC-70-5, SOT-353
Texas Instruments
SN74LVC1G79DCKRE4
Flip Flop 1 Element D-Type 1 Bit Positive Edge 5-TSSOP, SC-70-5, SOT-353
1 ul
4.4999999282424605e-9 s
3.999999984016789e-12 F
Non-Inverted
Positive Edge
160000000 Hz
-40 °C
125 °C
D-Type
Standard
0.000009999999747378752 A
Surface Mount
0.03200000151991844 A
0.03200000151991844 A
5.5 V
1.649999976158142 V
1 ul
SC-70-5
5-TSSOP, SC-70-5, SOT-353
Texas Instruments
SN74LVC1G79YEPR
Flip Flop 1 Element D-Type 1 Bit Positive Edge 5-XFBGA, DSBGA
1 ul
4.4999999282424605e-9 s
3.999999984016789e-12 F
Non-Inverted
Positive Edge
160000000 Hz
-40 °C
85 °C
D-Type
Standard
0.000009999999747378752 A
Surface Mount
0.03200000151991844 A
0.03200000151991844 A
5.5 V
1.649999976158142 V
1 ul
5-DSBGA (1.4x0.9)
5-XFBGA, DSBGA
Texas Instruments
SN74LVC1G79DBVTG4
Flip Flop 1 Element D-Type 1 Bit Positive Edge SC-74A, SOT-753
1 ul
4.4999999282424605e-9 s
3.999999984016789e-12 F
Non-Inverted
Positive Edge
160000000 Hz
-40 °C
125 °C
D-Type
Standard
0.000009999999747378752 A
Surface Mount
0.03200000151991844 A
0.03200000151991844 A
5.5 V
1.649999976158142 V
1 ul
SOT-23-5
SC-74A, SOT-753
Texas Instruments
SN74LVC1G79YZAR
Flip Flop 1 Element D-Type 1 Bit Positive Edge 5-XFBGA, DSBGA
1 ul
4.4999999282424605e-9 s
3.999999984016789e-12 F
Non-Inverted
Positive Edge
160000000 Hz
-40 °C
85 °C
D-Type
Standard
0.000009999999747378752 A
Surface Mount
0.03200000151991844 A
0.03200000151991844 A
5.5 V
1.649999976158142 V
1 ul
5-DSBGA (1.4x0.9)
5-XFBGA, DSBGA
Texas Instruments
SN74LVC1G79DCKRG4
Flip Flop 1 Element D-Type 1 Bit Positive Edge 5-TSSOP, SC-70-5, SOT-353
1 ul
4.4999999282424605e-9 s
3.999999984016789e-12 F
Non-Inverted
Positive Edge
160000000 Hz
-40 °C
125 °C
D-Type
Standard
0.000009999999747378752 A
Surface Mount
0.03200000151991844 A
0.03200000151991844 A
5.5 V
1.649999976158142 V
1 ul
SC-70-5
5-TSSOP, SC-70-5, SOT-353

Key Features

Available in the Texas InstrumentsNanoFree™ PackageLatch-Up Performance Exceeds 100 mA Per JESD 78, Class IIESD Protection Exceeds JESD 222000-V Human-Body Model (A114-A)200-V Machine Model (A115-A)1000-V Charged-Device Model (C101)Supports 5-V VCCOperationInputs Accept Voltages to 5.5 VSupports Down Translation to VCCMax tpdof 6 ns at 3.3 V and 50 pF loadLow Power Consumption, 10-µA Max ICC±24-mA Output Drive at 3.3 VIoffsupports Partial-Power-Down Mode and Back-Drive ProtectionAvailable in the Texas InstrumentsNanoFree™ PackageLatch-Up Performance Exceeds 100 mA Per JESD 78, Class IIESD Protection Exceeds JESD 222000-V Human-Body Model (A114-A)200-V Machine Model (A115-A)1000-V Charged-Device Model (C101)Supports 5-V VCCOperationInputs Accept Voltages to 5.5 VSupports Down Translation to VCCMax tpdof 6 ns at 3.3 V and 50 pF loadLow Power Consumption, 10-µA Max ICC±24-mA Output Drive at 3.3 VIoffsupports Partial-Power-Down Mode and Back-Drive Protection

Description

AI
The SN74LVC1G79 device is a single positive-edge-triggered D-type flip-flop that is designed for 1.65-V to 5.5-V VCCoperation. When data at the data (D) input meets the setup time requirement, the data is transferred to the Q output on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without affecting the level at the output. NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package. This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs when the device is powered down. This inhibits current backflow into the device which prevents damage to the device. The SN74LVC1G79 device is a single positive-edge-triggered D-type flip-flop that is designed for 1.65-V to 5.5-V VCCoperation. When data at the data (D) input meets the setup time requirement, the data is transferred to the Q output on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without affecting the level at the output. NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package. This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs when the device is powered down. This inhibits current backflow into the device which prevents damage to the device.