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SN65LVDS3487 Series

Quad LVDS driver

Manufacturer: Texas Instruments

Catalog

Quad LVDS driver

Key Features

Meet or Exceed the Requirements of ANSI TIA/EIA-644 StandardLow-Voltage Differential Signaling With Typical Output Voltage of 350 mV and 100-Ω LoadTypical Output Voltage Rise and Fall Times of 500 ps (400 Mbps)Typical Propagation Delay Times of 1.7 nsOperate From a Single 3.3-V SupplyPower Dissipation 25 mW Typical Per Driver at 200 MHzDriver at High-Impedance When Disabled or With VCC= 0Bus-Terminal ESD Protection Exceeds 8 kVLow-Voltage TTL (LVTTL) Logic Input LevelsPin Compatible With AM26LS31, MC3487, and µA9638Cold Sparing for Space and High-Reliability Applications Requiring RedundancyMeet or Exceed the Requirements of ANSI TIA/EIA-644 StandardLow-Voltage Differential Signaling With Typical Output Voltage of 350 mV and 100-Ω LoadTypical Output Voltage Rise and Fall Times of 500 ps (400 Mbps)Typical Propagation Delay Times of 1.7 nsOperate From a Single 3.3-V SupplyPower Dissipation 25 mW Typical Per Driver at 200 MHzDriver at High-Impedance When Disabled or With VCC= 0Bus-Terminal ESD Protection Exceeds 8 kVLow-Voltage TTL (LVTTL) Logic Input LevelsPin Compatible With AM26LS31, MC3487, and µA9638Cold Sparing for Space and High-Reliability Applications Requiring Redundancy

Description

AI
The SN55LVDS31, SN65LVDS31, SN65LVDS3487, and SN65LVDS9638 devices are differential line drivers that implement the electrical characteristics of low-voltage differential signaling (LVDS). This signaling technique lowers the output voltage levels of 5-V differential standard levels (such as TIA/EIA-422B) to reduce the power, increase the switching speeds, and allow operation with a 3.3-V supply rail. Any of the four current-mode drivers will deliver a minimum differential output voltage magnitude of 247 mV into a 100-Ω load when enabled. The SN55LVDS31, SN65LVDS31, SN65LVDS3487, and SN65LVDS9638 devices are differential line drivers that implement the electrical characteristics of low-voltage differential signaling (LVDS). This signaling technique lowers the output voltage levels of 5-V differential standard levels (such as TIA/EIA-422B) to reduce the power, increase the switching speeds, and allow operation with a 3.3-V supply rail. Any of the four current-mode drivers will deliver a minimum differential output voltage magnitude of 247 mV into a 100-Ω load when enabled.