65LVDS9637 Series

Dual LVDS receiver

Catalog(8 parts)

Part	Type	Mounting Type	Number of Drivers/Receivers▲▼	Protocol	Data Rate▲▼	Voltage - Supply▲▼	Voltage - Supply▲▼	Package / Case	Package / Case▲▼	Package / Case▲▼	Operating Temperature▲▼	Operating Temperature▲▼	Package / Case▲▼	Package / Case▲▼	Supplier Device Package	Receiver Hysteresis▲▼
Texas Instruments SN65LVDS9637DGKRG4 0/2 Receiver LVDS 8-VSSOP	Receiver	Surface Mount	2 ul	LVDS	157286400 bit/s	3.5999999046325684 V	3 V	8-MSOP, 8-TSSOP	0.0029972000047564507 m	0.003000000026077032 m	-40 °C	85 °C
Texas Instruments SN65LVDS9637DGN 0/2 Receiver LVDS 8-HVSSOP	Receiver	Surface Mount	2 ul	LVDS	157286400 bit/s	3.5999999046325684 V	3 V	8-MSOP, 8-TSSOP, Exposed Pad			-40 °C	85 °C	0.0029972000047564507 m	0.003000000026077032 m	8-HVSSOP
Texas Instruments SN65LVDS9637D 0/2 Receiver LVDS 8-SOIC	Receiver	Surface Mount	2 ul	LVDS	157286400 bit/s	3.5999999046325684 V	3 V	8-SOIC	0.003899999894201755 m		-40 °C	85 °C			8-SOIC
Texas Instruments SN65LVDS9637DGNR 0/2 Receiver LVDS 8-HVSSOP	Receiver	Surface Mount	2 ul	LVDS	157286400 bit/s	3.5999999046325684 V	3 V	8-MSOP, 8-TSSOP, Exposed Pad			-40 °C	85 °C	0.0029972000047564507 m	0.003000000026077032 m	8-HVSSOP
Texas Instruments SN65LVDS9637DRG4 0/2 Receiver LVDS 8-SOIC	Receiver	Surface Mount	2 ul	LVDS	157286400 bit/s	3.5999999046325684 V	3 V	8-SOIC	0.003899999894201755 m		-40 °C	85 °C			8-SOIC
Texas Instruments SN65LVDS9637DGKR 0/2 Receiver LVDS 8-VSSOP	Receiver	Surface Mount	2 ul	LVDS	157286400 bit/s	3.5999999046325684 V	3 V	8-MSOP, 8-TSSOP	0.0029972000047564507 m	0.003000000026077032 m	-40 °C	85 °C
Texas Instruments SN65LVDS9637DGKG4 0/2 Receiver LVDS 8-VSSOP	Receiver	Surface Mount	2 ul	LVDS	157286400 bit/s	3.5999999046325684 V	3 V	8-MSOP, 8-TSSOP	0.0029972000047564507 m	0.003000000026077032 m	-40 °C	85 °C
Texas Instruments SN65LVDS9637BDR 0/2 Receiver LVDS 8-SOIC	Receiver	Surface Mount	2 ul	LVDS	419430400 bit/s	3.5999999046325684 V	3 V	8-SOIC	0.003899999894201755 m		-40 °C	85 °C			8-SOIC	0.05000000074505806 V

Key Features

• Meet or Exceed the Requirements of ANSITIA/EIA-644 StandardOperate With a Single 3.3-V SupplyDesigned for Signaling Rates of up to150 MbpsDifferential Input Thresholds ±100 mV MaxTypical Propagation Delay Time of 2.1 nsPower Dissipation 60 mW Typical PerReceiver at Maximum Data RateBus-Terminal ESD Protection Exceeds 8 kVLow-Voltage TTL (LVTTL) Logic OutputLevelsPin Compatible With AM26LS32, MC3486,and µA9637Open-Circuit Fail-SafeCold Sparing for Space and High-ReliabilityApplications Requiring RedundancyMeet or Exceed the Requirements of ANSITIA/EIA-644 StandardOperate With a Single 3.3-V SupplyDesigned for Signaling Rates of up to150 MbpsDifferential Input Thresholds ±100 mV MaxTypical Propagation Delay Time of 2.1 nsPower Dissipation 60 mW Typical PerReceiver at Maximum Data RateBus-Terminal ESD Protection Exceeds 8 kVLow-Voltage TTL (LVTTL) Logic OutputLevelsPin Compatible With AM26LS32, MC3486,and µA9637Open-Circuit Fail-SafeCold Sparing for Space and High-ReliabilityApplications Requiring Redundancy

Description

The SN55LVDS32, SN65LVDS32, SN65LVDS3486, and SN65LVDS9637 devices are differential line receivers that implement the electrical characteristics of low-voltage differential signaling (LVDS). This signaling technique lowers the output voltage levels of 5-V differential standard levels (such as EIA/TIA-422B) to reduce the power, increase the switching speeds, and allow operation with a 3.3-V supply rail. Any of the differential receivers provides a valid logical output state with a ±100-mV differential input voltage within the input common-mode voltage range. The input common-mode voltage range allows 1 V of ground potential difference between two LVDS nodes. The intended application of these devices and signaling technique is both point-to-point and multidrop (one driver and multiple receivers) data transmission over controlled impedance media of approximately 100 Ω. The transmission media may be printed-circuit board traces, backplanes, or cables. The ultimate rate and distance of data transfer depends on the attenuation characteristics of the media and the noise coupling to the environment. The SN65LVDS32, SN65LVDS3486, and SN65LVDS9637 devices are characterized for operation from –40°C to 85°C. The SN55LVDS32 device is characterized for operation from –55°C to 125°C. The SN55LVDS32, SN65LVDS32, SN65LVDS3486, and SN65LVDS9637 devices are differential line receivers that implement the electrical characteristics of low-voltage differential signaling (LVDS). This signaling technique lowers the output voltage levels of 5-V differential standard levels (such as EIA/TIA-422B) to reduce the power, increase the switching speeds, and allow operation with a 3.3-V supply rail. Any of the differential receivers provides a valid logical output state with a ±100-mV differential input voltage within the input common-mode voltage range. The input common-mode voltage range allows 1 V of ground potential difference between two LVDS nodes. The intended application of these devices and signaling technique is both point-to-point and multidrop (one driver and multiple receivers) data transmission over controlled impedance media of approximately 100 Ω. The transmission media may be printed-circuit board traces, backplanes, or cables. The ultimate rate and distance of data transfer depends on the attenuation characteristics of the media and the noise coupling to the environment. The SN65LVDS32, SN65LVDS3486, and SN65LVDS9637 devices are characterized for operation from –40°C to 85°C. The SN55LVDS32 device is characterized for operation from –55°C to 125°C.