Catalog(1 parts)
| Part | Supplier Device Package▲▼ | Supplier Device Package | Supplier Device Package▲▼ | Type | Operating Temperature▲▼ | Operating Temperature▲▼ | Number of Elements▲▼ | Voltage - Supply▲▼ | Voltage - Supply▲▼ | Number of Bits per Element▲▼ | Clock Frequency▲▼ | Output Type | Mounting Type | Package / Case | Trigger Type | Current - Output High, Low▲▼ | Current - Quiescent (Iq)▲▼ | Max Propagation Delay @ V, Max CL▲▼ |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
8.890000343322754 ul | 20-LCCC | 8.890000343322754 ul | D-Type | -55 °C | 125 °C | 1 ul | 5.5 V | 4.5 V | 8 ul | 30000000 Hz | Non-Inverted | Surface Mount | 20-CLCC | Positive Edge | 0.012000000104308128 A | 0.028999999165534973 A | 1.999999987845058e-8 s |
Key Features
• Contain Eight Flip-Flops With Single-Rail OutputsBuffered Clock and Direct-Clear InputsIndividual Data Input to Each Flip-FlopApplications Include:Buffer/Storage RegistersShift RegistersPattern GeneratorsPackage Options Include Plastic Small-Outline (DW) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mil DIPsContain Eight Flip-Flops With Single-Rail OutputsBuffered Clock and Direct-Clear InputsIndividual Data Input to Each Flip-FlopApplications Include:Buffer/Storage RegistersShift RegistersPattern GeneratorsPackage Options Include Plastic Small-Outline (DW) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mil DIPs
Description
AI
These octal positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic with a direct-clear () input.
Information at the data (D) inputs meeting the setup-time requirements is transferred to the Q outputs on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When CLK is at either the high or low level, the D input signal has no effect at the output.
The SN54ALS273 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS273 is characterized for operation from 0°C to 70°C.
These octal positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic with a direct-clear () input.
Information at the data (D) inputs meeting the setup-time requirements is transferred to the Q outputs on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When CLK is at either the high or low level, the D input signal has no effect at the output.
The SN54ALS273 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS273 is characterized for operation from 0°C to 70°C.