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ADC12DL080 Series

Dual-Channel, 12-Bit, 80-MSPS, 600-MHz Input Bandwidth Analog-to-Digital Converter (ADC)

Manufacturer: Texas Instruments

Catalog(1 parts)

PartRatio - S/H:ADCSampling Rate (Per Second)Mounting TypeArchitectureVoltage - Supply, AnalogVoltage - Supply, AnalogReference TypeData InterfaceOperating TemperatureOperating TemperatureNumber of InputsInput TypeSupplier Device PackageFeaturesConfigurationNumber of A/D ConvertersVoltage - Supply, DigitalVoltage - Supply, DigitalPackage / CaseNumber of Bits
Texas Instruments
ADC12DL080CIVS/NOPB
12 Bit Analog to Digital Converter 2 Input 2 Pipelined 64-TQFP (10x10)
1:1
80 m
Surface Mount
Pipelined
3.5999999046325684 V
3 V
External, Internal
Parallel
-40 °C
85 °C
2 ul
Differential
64-TQFP (10x10)
Simultaneous Sampling
S/H-ADC
2 ul
3.5999999046325684 V
2.4000000953674316 V
64-TQFP
12 ul

Key Features

Single +3.3V Supply OperationInternal Sample-and-HoldInternal or External ReferenceOutputs 2.4V to 3.6V CompatiblePower Down ModeDuty Cycle StabilizerPin Compatible with ADC12DL040, ADC12DL065, ADC12DL066Key SpecificationsResolution: 12 BitsMax Conversion Rate: 80 MSPSDNL: ±0.4 LSB (typ)SNR (fIN=40MHz): 69 dB (typ)SNR (fIN=200MHz): 67 dB(typ)SFDR (fIN=40MHz): 82 dB (typ)SFDR (fIN=200MHz): 81 dB (typ)Power ConsumptionOperating: 447 mW (typ)Power Down Mode: 50 mW (typ)All trademarks are the property of their respective owners.Single +3.3V Supply OperationInternal Sample-and-HoldInternal or External ReferenceOutputs 2.4V to 3.6V CompatiblePower Down ModeDuty Cycle StabilizerPin Compatible with ADC12DL040, ADC12DL065, ADC12DL066Key SpecificationsResolution: 12 BitsMax Conversion Rate: 80 MSPSDNL: ±0.4 LSB (typ)SNR (fIN=40MHz): 69 dB (typ)SNR (fIN=200MHz): 67 dB(typ)SFDR (fIN=40MHz): 82 dB (typ)SFDR (fIN=200MHz): 81 dB (typ)Power ConsumptionOperating: 447 mW (typ)Power Down Mode: 50 mW (typ)All trademarks are the property of their respective owners.

Description

AI
The ADC12DL080 is a dual, low power monolithic CMOS analog-to-digital converter capable of converting analog input signals into 12-bit digital words at 80 Megasamples per second (MSPS). This converter uses a differential, pipeline architecture with digital error correction and an on-chip sample-and-hold circuit to minimize power consumption while providing excellent dynamic performance and a 600 MHz Full Power Bandwidth. Operating on a single +3.3V power supply, the ADC12DL080 achieves 11.0 effective bits at Nyquist and consumes just 447mW at 80 MSPS. The Power Down feature reduces power consumption to 50 mW. The differential inputs provide a full scale differential input swing equal to 2 times VREFwith the possibility of a single-ended input. Full use of the differential input is recommended for optimum performance. Duty cycle stabilization and output data format are selectable. The output data can be set for offset binary or two's complement. To ease interfacing to lower voltage systems, the digital output driver power pins of the ADC12DL080 can be connected to a separate supply voltage in the range of 2.4V to the analog supply voltage. This device is available in the 64-lead TQFP package and will operate over the industrial temperature range of −40°C to +85°C. An evaluation board is available to ease the evaluation process. The ADC12DL080 is a dual, low power monolithic CMOS analog-to-digital converter capable of converting analog input signals into 12-bit digital words at 80 Megasamples per second (MSPS). This converter uses a differential, pipeline architecture with digital error correction and an on-chip sample-and-hold circuit to minimize power consumption while providing excellent dynamic performance and a 600 MHz Full Power Bandwidth. Operating on a single +3.3V power supply, the ADC12DL080 achieves 11.0 effective bits at Nyquist and consumes just 447mW at 80 MSPS. The Power Down feature reduces power consumption to 50 mW. The differential inputs provide a full scale differential input swing equal to 2 times VREFwith the possibility of a single-ended input. Full use of the differential input is recommended for optimum performance. Duty cycle stabilization and output data format are selectable. The output data can be set for offset binary or two's complement. To ease interfacing to lower voltage systems, the digital output driver power pins of the ADC12DL080 can be connected to a separate supply voltage in the range of 2.4V to the analog supply voltage. This device is available in the 64-lead TQFP package and will operate over the industrial temperature range of −40°C to +85°C. An evaluation board is available to ease the evaluation process.