Catalog(2 parts)
Part | Number of Bits per Element▲▼ | Trigger Type | Package / Case | Package / Case▲▼ | Package / Case▲▼ | Function | Clock Frequency▲▼ | Number of Elements▲▼ | Current - Quiescent (Iq)▲▼ | Max Propagation Delay @ V, Max CL▲▼ | Mounting Type | Output Type | Operating Temperature▲▼ | Operating Temperature▲▼ | Supplier Device Package | Type | Voltage - Supply▲▼ | Voltage - Supply▲▼ | Current - Output High, Low▲▼ | Current - Output High, Low▲▼ | Package / Case▲▼ |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
8 ul | Positive Edge | 20-DIP | 0.007619999814778566 m | 0.007619999814778566 m | Standard | 125000000 Hz | 1 ul | 0.07199999690055847 A | 8.999999856484921e-9 s | Through Hole | Non-Inverted | 70 °C | 0 °C | 20-PDIP | D-Type | 5.5 V | 4.5 V | 0.019999999552965164 A | 0.0010000000474974513 A | ||
Texas Instruments SN74F377ADWRFlip Flop 1 Element D-Type 8 Bit Positive Edge 20-SOIC (0.295", 7.50mm Width) | 8 ul | Positive Edge | 20-SOIC | Standard | 125000000 Hz | 1 ul | 0.07199999690055847 A | 8.999999856484921e-9 s | Surface Mount | Non-Inverted | 70 °C | 0 °C | 20-SOIC | D-Type | 5.5 V | 4.5 V | 0.019999999552965164 A | 0.0010000000474974513 A | 0.007493000011891127 m, 0.007499999832361937 m |
Key Features
• Contains Eight D-Type Flip-Flops With Single-Rail OutputsClock Enable Latched to Avoid False ClockingApplications Include:Buffer/Storage RegistersShift RegistersPattern GeneratorsBuffered Common Enable InputPackage Options Include Plastic Small-Outline Packages and Standard Plastic 300-mil DIPsContains Eight D-Type Flip-Flops With Single-Rail OutputsClock Enable Latched to Avoid False ClockingApplications Include:Buffer/Storage RegistersShift RegistersPattern GeneratorsBuffered Common Enable InputPackage Options Include Plastic Small-Outline Packages and Standard Plastic 300-mil DIPs
Description
AI
The SN74F377A is a monolithic, positive-edge-triggered, octal, D-type flip-flop with clock enable inputs. The SN74F377A features a latched clock enable () input.
Information at the data (D) inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock pulse ifis low. Clock triggering occurs at a particular voltage level and is not directly related to the positive-going pulse. When the clock input is at either the high or low level, the D input signal has no effect at the output. The circuits are designed to prevent false clocking by transitions at theinput.
The SN74F377A is characterized for operation from 0°C to 70°C.
The SN74F377A is a monolithic, positive-edge-triggered, octal, D-type flip-flop with clock enable inputs. The SN74F377A features a latched clock enable () input.
Information at the data (D) inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock pulse ifis low. Clock triggering occurs at a particular voltage level and is not directly related to the positive-going pulse. When the clock input is at either the high or low level, the D input signal has no effect at the output. The circuits are designed to prevent false clocking by transitions at theinput.
The SN74F377A is characterized for operation from 0°C to 70°C.