74LV240 Series

8-ch, 2V to 5.5V inverters with 3-state outputs

Catalog(5 parts)

Part	Logic Type	Mounting Type	Voltage - Supply▲▼	Voltage - Supply▲▼	Operating Temperature▲▼	Operating Temperature▲▼	Current - Output High, Low▲▼	Current - Output High, Low▲▼	Supplier Device Package	Number of Bits per Element▲▼	Package / Case	Package / Case▲▼	Output Type	Number of Elements▲▼	Package / Case▲▼
Texas Instruments SN74LV240ANSR Buffer, Inverting 2 Element 4 Bit per Element 3-State Output 20-SO	Buffer, Inverting	Surface Mount	2 V	5.5 V	-40 °C	125 °C	0.01600000075995922 A	0.01600000075995922 A	20-SO	4 ul	20-SOIC	0.0052999998442828655 m, 0.005308600142598152 m	3-State	2 ul
Texas Instruments SN74LV240APW Buffer, Inverting 2 Element 4 Bit per Element 3-State Output 20-TSSOP	Buffer, Inverting	Surface Mount	2 V	5.5 V	-40 °C	125 °C	0.01600000075995922 A	0.01600000075995922 A	20-TSSOP	4 ul	20-TSSOP	0.004394200164824724 m	3-State	2 ul	0.004399999976158142 m
Texas Instruments SN74LV240ADW Buffer, Inverting 2 Element 4 Bit per Element 3-State Output 20-SOIC	Buffer, Inverting	Surface Mount	2 V	5.5 V	-40 °C	125 °C	0.01600000075995922 A	0.01600000075995922 A	20-SOIC	4 ul	20-SOIC	0.007493000011891127 m, 0.007499999832361937 m	3-State	2 ul
Texas Instruments SN74LV240APWG4 Buffer, Inverting 2 Element 4 Bit per Element 3-State Output 20-TSSOP	Buffer, Inverting	Surface Mount	2 V	5.5 V	-40 °C	125 °C	0.01600000075995922 A	0.01600000075995922 A	20-TSSOP	4 ul	20-TSSOP	0.004394200164824724 m	3-State	2 ul	0.004399999976158142 m
Texas Instruments SN74LV240APWR Buffer, Inverting 2 Element 4 Bit per Element 3-State Output 20-TSSOP	Buffer, Inverting	Surface Mount	2 V	5.5 V	-40 °C	125 °C	0.01600000075995922 A	0.01600000075995922 A	20-TSSOP	4 ul	20-TSSOP	0.004394200164824724 m	3-State	2 ul	0.004399999976158142 m

Key Features

• VCC operation of 2V to 5.5VMax tpd of 6.5ns at 5VTypical VOLP (output ground bounce) <0.8V at VCC = 3.3V, TA = 25°CTypical VOHV (output VOH undershoot) >2.3V at VCC = 3.3V, TA = 25°CSupport mixed-mode voltage operation on all portsLatch-up performance exceeds 250mA per JESD 17Ioff supports live insertion, partial power-down mode, and back drive protectionVCC operation of 2V to 5.5VMax tpd of 6.5ns at 5VTypical VOLP (output ground bounce) <0.8V at VCC = 3.3V, TA = 25°CTypical VOHV (output VOH undershoot) >2.3V at VCC = 3.3V, TA = 25°CSupport mixed-mode voltage operation on all portsLatch-up performance exceeds 250mA per JESD 17Ioff supports live insertion, partial power-down mode, and back drive protection

Description

These octal buffers/drivers with inverted outputs are designed for 2V to 5.5V VCC operation. The ’LV240A devices are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. These devices are organized as two 4-bit buffers/line drivers with separate output-enable ( OE) inputs. When OE is low, the device passes inverted data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state. These octal buffers/drivers with inverted outputs are designed for 2V to 5.5V VCC operation. The ’LV240A devices are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. These devices are organized as two 4-bit buffers/line drivers with separate output-enable ( OE) inputs. When OE is low, the device passes inverted data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state.