Catalog(3 parts)
Part | Number of Elements▲▼ | Max Propagation Delay @ V, Max CL▲▼ | Package / Case▲▼ | Package / Case | Current - Output High, Low▲▼ | Current - Output High, Low▲▼ | Operating Temperature▲▼ | Operating Temperature▲▼ | Voltage - Supply▲▼ | Voltage - Supply▲▼ | Trigger Type | Supplier Device Package | Number of Bits per Element▲▼ | Type | Mounting Type | Clock Frequency▲▼ | Current - Quiescent (Iq)▲▼ | Output Type |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
1 ul | 2.999999892949745e-8 s | 0.007619999814778566 m, 0.007619999814778566 m | 16-DIP | 0.00800000037997961 A | 0.00039999998989515007 A | 70 °C | 0 °C | 4.75 V | 5.25 V | Positive Edge | 16-PDIP | 6 ul | D-Type | Through Hole | 40000000 Hz | 0.026000000536441803 A | Non-Inverted | |
Texas Instruments SN74LS174NSRFlip Flop 1 Element D-Type 6 Bit Positive Edge 16-SOIC (0.209", 5.30mm Width) | 1 ul | 2.999999892949745e-8 s | 16-SOIC (0.209", 5.30mm Width) | 0.00800000037997961 A | 0.00039999998989515007 A | 70 °C | 0 °C | 4.75 V | 5.25 V | Positive Edge | 16-SO | 6 ul | D-Type | Surface Mount | 40000000 Hz | 0.026000000536441803 A | Non-Inverted | |
Texas Instruments SN74LS174DRFlip Flop 1 Element D-Type 6 Bit Positive Edge 16-SOIC (0.154", 3.90mm Width) | 1 ul | 2.999999892949745e-8 s | 0.003911599982529879 m, 3.900000095367432 ul | 16-SOIC | 0.00800000037997961 A | 0.00039999998989515007 A | 70 °C | 0 °C | 4.75 V | 5.25 V | Positive Edge | 16-SOIC | 6 ul | D-Type | Surface Mount | 40000000 Hz | 0.026000000536441803 A | Non-Inverted |
Key Features
• '174, 'LS174, 'S174 Contain Six Flip-Flops with Single-Rail Outputs'175, 'LS175, 'S175 Contain Four Flip-Flops with Double-Rail OutputsThree Performance Ranges Offered: See Table Lower RightBuffered Clock and Direct Clear InputsIndividual Data Input to Each Flip-FlopApplications include:Buffer/Storage RegistersShift RegistersPattern Generators'174, 'LS174, 'S174 Contain Six Flip-Flops with Single-Rail Outputs'175, 'LS175, 'S175 Contain Four Flip-Flops with Double-Rail OutputsThree Performance Ranges Offered: See Table Lower RightBuffered Clock and Direct Clear InputsIndividual Data Input to Each Flip-FlopApplications include:Buffer/Storage RegistersShift RegistersPattern Generators
Description
AI
These monolithic, positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic. All have a direct clear input, and the '175, 'LS175, and 'S175 feature complementary outputs from each flip-flop.
Information at the D inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When the clock input is at either the high or low level, the D input signal has no effect at the output.
These circuits are fully compatible for use with most TTL circuits.
These monolithic, positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic. All have a direct clear input, and the '175, 'LS175, and 'S175 feature complementary outputs from each flip-flop.
Information at the D inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When the clock input is at either the high or low level, the D input signal has no effect at the output.
These circuits are fully compatible for use with most TTL circuits.