CD54HCT164 Series
High Speed CMOS Logic 8-Bit Serial-In/Parallel-Out Shift Register
Manufacturer: Texas Instruments
Link to Manufacturer Page: https://www.ti.com/
Catalog
High Speed CMOS Logic 8-Bit Serial-In/Parallel-Out Shift Register
Part | Output Type | Voltage - Supply [Max] | Voltage - Supply [Min] | Number of Bits per Element | Function | Operating Temperature [Min] | Operating Temperature [Max] | Supplier Device Package | Mounting Type | Number of Elements [custom] | Logic Type | Package / Case | Package / Case |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Texas Instruments 5962-8970401CA | |||||||||||||
Texas Instruments CD54HCT164F3A | Push-Pull | 5.5 V | 4.5 V | 8 | Serial to Parallel | -55 C | 125 °C | 14-CDIP | Through Hole | 1 | Shift Register | 0.3 in, 7.62 mm | 14-CDIP |
Key Features
• Buffered inputsAsynchronous resetTypical fMAX = 60MHz at VCC = 5V, CL = 15pF, TA = 25°CFanout (overtemperature range)Standard Outputs: 10 LSTTL loadsBus driver outputs: 15 LSTTL loadsWide operating temp range: – 55°C to 125°CBalanced propagation delay and transition timesSignificant power reduction compared to LSTTL logic ICsHC types2V to 6V operationHigh noise immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5VHCT types4.5V to 5.5V operationDirect LSTTL input logic compatibility, VIL = 0.8V (Max), VIH = 2V (Min)CMOS input compatibility, II ≤ 1µA at VOL, VOHBuffered inputsAsynchronous resetTypical fMAX = 60MHz at VCC = 5V, CL = 15pF, TA = 25°CFanout (overtemperature range)Standard Outputs: 10 LSTTL loadsBus driver outputs: 15 LSTTL loadsWide operating temp range: – 55°C to 125°CBalanced propagation delay and transition timesSignificant power reduction compared to LSTTL logic ICsHC types2V to 6V operationHigh noise immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5VHCT types4.5V to 5.5V operationDirect LSTTL input logic compatibility, VIL = 0.8V (Max), VIH = 2V (Min)CMOS input compatibility, II ≤ 1µA at VOL, VOH
Description
AI
The ’HC164 and ’HCT164 are 8-bit, serial-in, parallel-out, shift registers with asynchronous reset. Data is shifted on the positive edge of Clock (CLK). A LOW on the RESET (CLR) pin resets the shift register and all outputs go to the LOW state regardless of the input conditions. Two Serial Data inputs (A and B) are provided, either one can be used as a data enable control.
The ’HC164 and ’HCT164 are 8-bit, serial-in, parallel-out, shift registers with asynchronous reset. Data is shifted on the positive edge of Clock (CLK). A LOW on the RESET (CLR) pin resets the shift register and all outputs go to the LOW state regardless of the input conditions. Two Serial Data inputs (A and B) are provided, either one can be used as a data enable control.