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74LV374 Series

Automotive Catalog Octal Edge-Triggered D-Type Flip-Flops With 3-State Outputs

Manufacturer: Texas Instruments

Catalog(16 parts)

PartOperating Temperature▲▼Operating Temperature▲▼Current - Quiescent (Iq)▲▼Package / Case▲▼Package / Case▲▼Package / CaseFunctionClock Frequency▲▼Voltage - Supply▲▼Voltage - Supply▲▼TypeNumber of Elements▲▼Number of Bits per Element▲▼Supplier Device PackageOutput TypeTrigger TypeMax Propagation Delay @ V, Max CL▲▼Input Capacitance▲▼Mounting TypeCurrent - Output High, Low▲▼Current - Output High, Low▲▼QualificationGrade
Texas Instruments
SN74LV374APWT
Flip Flop 1 Element D-Type 8 Bit Positive Edge 20-TSSOP (0.173", 4.40mm Width)
85 °C
-40 °C
0.000019999999494757503 A
0.004394200164824724 m
0.004399999976158142 m
20-TSSOP
Standard
170000000 Hz
2 V
5.5 V
D-Type
1 ul
8 ul
20-TSSOP
Tri-State, Non-Inverted
Positive Edge
1.0099999947499327e-8 s
2.899999901675998e-12 F
Surface Mount
0.01600000075995922 A
0.01600000075995922 A
Texas Instruments
SN74LV374ATPWT
Flip Flop 1 Element D-Type 8 Bit Positive Edge 20-TSSOP (0.173", 4.40mm Width)
125 °C
-40 °C
0.0000019999999949504854 A
0.004394200164824724 m
0.004399999976158142 m
20-TSSOP
Standard
150000000 Hz
4.5 V
5.5 V
D-Type
1 ul
8 ul
20-TSSOP
Tri-State, Non-Inverted
Positive Edge
1.0099999947499327e-8 s
3.999999984016789e-12 F
Surface Mount
0.01600000075995922 A
0.01600000075995922 A
Texas Instruments
SN74LV374ATRGYRG4
Flip Flop 1 Element D-Type 8 Bit Positive Edge 20-VFQFN Exposed Pad
125 °C
-40 °C
0.0000019999999949504854 A
20-VFQFN Exposed Pad
Standard
150000000 Hz
4.5 V
5.5 V
D-Type
1 ul
8 ul
20-VQFN (3.5x4.5)
Tri-State, Non-Inverted
Positive Edge
1.0099999947499327e-8 s
3.999999984016789e-12 F
Surface Mount
0.01600000075995922 A
0.01600000075995922 A
Texas Instruments
SN74LV374ATNSR
Flip Flop 1 Element D-Type 8 Bit Positive Edge 20-SOIC (0.209", 5.30mm Width)
125 °C
-40 °C
0.0000019999999949504854 A
0.0052999998442828655 m, 0.005308600142598152 m
20-SOIC
Standard
150000000 Hz
4.5 V
5.5 V
D-Type
1 ul
8 ul
20-SO
Tri-State, Non-Inverted
Positive Edge
1.0099999947499327e-8 s
3.999999984016789e-12 F
Surface Mount
0.01600000075995922 A
0.01600000075995922 A
Texas Instruments
SN74LV374ATNS
Flip Flop 1 Element D-Type 8 Bit Positive Edge 20-SOIC (0.209", 5.30mm Width)
125 °C
-40 °C
0.0000019999999949504854 A
0.0052999998442828655 m, 0.005308600142598152 m
20-SOIC
Standard
150000000 Hz
4.5 V
5.5 V
D-Type
1 ul
8 ul
20-SO
Tri-State, Non-Inverted
Positive Edge
1.0099999947499327e-8 s
3.999999984016789e-12 F
Surface Mount
0.01600000075995922 A
0.01600000075995922 A
Texas Instruments
SN74LV374ATPW
Flip Flop 1 Element D-Type 8 Bit Positive Edge 20-TSSOP (0.173", 4.40mm Width)
125 °C
-40 °C
0.0000019999999949504854 A
0.004394200164824724 m
0.004399999976158142 m
20-TSSOP
Standard
150000000 Hz
4.5 V
5.5 V
D-Type
1 ul
8 ul
20-TSSOP
Tri-State, Non-Inverted
Positive Edge
1.0099999947499327e-8 s
3.999999984016789e-12 F
Surface Mount
0.01600000075995922 A
0.01600000075995922 A
Texas Instruments
SN74LV374ATPWRQ1
Flip Flop 1 Element D-Type 8 Bit Positive Edge 20-TSSOP (0.173", 4.40mm Width)
105 °C
-40 °C
0.000019999999494757503 A
0.004394200164824724 m
0.004399999976158142 m
20-TSSOP
Standard
170000000 Hz
2 V
5.5 V
D-Type
1 ul
8 ul
20-TSSOP
Tri-State, Non-Inverted
Positive Edge
1.0099999947499327e-8 s
2.899999901675998e-12 F
Surface Mount
0.01600000075995922 A
0.01600000075995922 A
AEC-Q100
Automotive
Texas Instruments
SN74LV374ATDW
Flip Flop 1 Element D-Type 8 Bit Positive Edge 20-SOIC (0.295", 7.50mm Width)
125 °C
-40 °C
0.0000019999999949504854 A
0.007493000011891127 m, 0.007499999832361937 m
20-SOIC
Standard
150000000 Hz
4.5 V
5.5 V
D-Type
1 ul
8 ul
20-SOIC
Tri-State, Non-Inverted
Positive Edge
1.0099999947499327e-8 s
3.999999984016789e-12 F
Surface Mount
0.01600000075995922 A
0.01600000075995922 A
Texas Instruments
SN74LV374ATPWRG4Q1
Flip Flop 1 Element D-Type 8 Bit Positive Edge 20-TSSOP (0.173", 4.40mm Width)
105 °C
-40 °C
0.000019999999494757503 A
0.004394200164824724 m
0.004399999976158142 m
20-TSSOP
Standard
170000000 Hz
2 V
5.5 V
D-Type
1 ul
8 ul
20-TSSOP
Tri-State, Non-Inverted
Positive Edge
1.0099999947499327e-8 s
2.899999901675998e-12 F
Surface Mount
0.01600000075995922 A
0.01600000075995922 A
AEC-Q100
Automotive
Texas Instruments
SN74LV374ATNSG4
Flip Flop 1 Element D-Type 8 Bit Positive Edge 20-SOIC (0.209", 5.30mm Width)
125 °C
-40 °C
0.0000019999999949504854 A
0.0052999998442828655 m, 0.005308600142598152 m
20-SOIC
Standard
150000000 Hz
4.5 V
5.5 V
D-Type
1 ul
8 ul
20-SO
Tri-State, Non-Inverted
Positive Edge
1.0099999947499327e-8 s
3.999999984016789e-12 F
Surface Mount
0.01600000075995922 A
0.01600000075995922 A
Texas Instruments
SN74LV374ATDWR
Flip Flop 1 Element D-Type 8 Bit Positive Edge 20-SOIC (0.295", 7.50mm Width)
125 °C
-40 °C
0.0000019999999949504854 A
0.007493000011891127 m, 0.007499999832361937 m
20-SOIC
Standard
150000000 Hz
4.5 V
5.5 V
D-Type
1 ul
8 ul
20-SOIC
Tri-State, Non-Inverted
Positive Edge
1.0099999947499327e-8 s
3.999999984016789e-12 F
Surface Mount
0.01600000075995922 A
0.01600000075995922 A
Texas Instruments
SN74LV374ADW
Flip Flop 1 Element D-Type 8 Bit Positive Edge 20-SOIC (0.295", 7.50mm Width)
85 °C
-40 °C
0.000019999999494757503 A
0.007493000011891127 m, 0.007499999832361937 m
20-SOIC
Standard
170000000 Hz
2 V
5.5 V
D-Type
1 ul
8 ul
20-SOIC
Tri-State, Non-Inverted
Positive Edge
1.0099999947499327e-8 s
2.899999901675998e-12 F
Surface Mount
0.01600000075995922 A
0.01600000075995922 A
Texas Instruments
SN74LV374ARGYR
Flip Flop 1 Element D-Type 8 Bit Positive Edge 20-VFQFN Exposed Pad
85 °C
-40 °C
0.000019999999494757503 A
20-VFQFN Exposed Pad
Standard
170000000 Hz
2 V
5.5 V
D-Type
1 ul
8 ul
20-VQFN (3.5x4.5)
Tri-State, Non-Inverted
Positive Edge
1.0099999947499327e-8 s
2.899999901675998e-12 F
Surface Mount
0.01600000075995922 A
0.01600000075995922 A
Texas Instruments
SN74LV374APWR
Flip Flop 1 Element D-Type 8 Bit Positive Edge 20-TSSOP (0.173", 4.40mm Width)
85 °C
-40 °C
0.000019999999494757503 A
0.004394200164824724 m
0.004399999976158142 m
20-TSSOP
Standard
170000000 Hz
2 V
5.5 V
D-Type
1 ul
8 ul
20-TSSOP
Tri-State, Non-Inverted
Positive Edge
1.0099999947499327e-8 s
2.899999901675998e-12 F
Surface Mount
0.01600000075995922 A
0.01600000075995922 A
Texas Instruments
SN74LV374APW
Flip Flop 1 Element D-Type 8 Bit Positive Edge 20-TSSOP (0.173", 4.40mm Width)
85 °C
-40 °C
0.000019999999494757503 A
0.004394200164824724 m
0.004399999976158142 m
20-TSSOP
Standard
170000000 Hz
2 V
5.5 V
D-Type
1 ul
8 ul
20-TSSOP
Tri-State, Non-Inverted
Positive Edge
1.0099999947499327e-8 s
2.899999901675998e-12 F
Surface Mount
0.01600000075995922 A
0.01600000075995922 A
Texas Instruments
SN74LV374ADWR
Flip Flop 1 Element D-Type 8 Bit Positive Edge 20-SOIC (0.295", 7.50mm Width)
85 °C
-40 °C
0.000019999999494757503 A
0.007493000011891127 m, 0.007499999832361937 m
20-SOIC
Standard
170000000 Hz
2 V
5.5 V
D-Type
1 ul
8 ul
20-SOIC
Tri-State, Non-Inverted
Positive Edge
1.0099999947499327e-8 s
2.899999901675998e-12 F
Surface Mount
0.01600000075995922 A
0.01600000075995922 A

Key Features

• Qualified for Automotive ApplicationsTypical VOLP(Output Ground Bounce)<0.8 V at VCC= 3.3 V, TA= 25°CTypical VOHV(Output VOHUndershoot)>2 V at VCC= 3.3 V, TA= 25°CSupports Mixed-Mode Signal Operation on All PortsIoffSupports Partial-Power-Down Mode OperationESD Protection Exceeds JESD 222000-V Human-Body Model (A114-A)200-V Machine Model (A115-A)1000-V Charged-Device Model (C101)Qualified for Automotive ApplicationsTypical VOLP(Output Ground Bounce)<0.8 V at VCC= 3.3 V, TA= 25°CTypical VOHV(Output VOHUndershoot)>2 V at VCC= 3.3 V, TA= 25°CSupports Mixed-Mode Signal Operation on All PortsIoffSupports Partial-Power-Down Mode OperationESD Protection Exceeds JESD 222000-V Human-Body Model (A114-A)200-V Machine Model (A115-A)1000-V Charged-Device Model (C101)

Description

AI
The SN74LV374A is an octal edge-triggered D-type flip-flop designed for 2-V to 5.5-V VCCoperation. This device features 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. It is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. On the positive transition of the clock (CLK) input, the Q outputs are set to the logic levels set up at the data (D) inputs. A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus lines without need for interface or pullup components. OEdoes not affect internal operations of the latch. Old data can be retained or new data can be entered while the outputs are in the high-impedance state. To ensure the high-impedance state during power up or power down, OE\ should be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The SN74LV374A is an octal edge-triggered D-type flip-flop designed for 2-V to 5.5-V VCCoperation. This device features 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. It is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. On the positive transition of the clock (CLK) input, the Q outputs are set to the logic levels set up at the data (D) inputs. A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus lines without need for interface or pullup components. OEdoes not affect internal operations of the latch. Old data can be retained or new data can be entered while the outputs are in the high-impedance state. To ensure the high-impedance state during power up or power down, OE\ should be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.