CDCVF2310 Series

High performance 1:10 clock buffer for general purpose applications with support up to 105C

Link to Manufacturer Page: https://www.ti.com/

Catalog

High performance 1:10 clock buffer for general purpose applications with support up to 105C

Part	Operating Temperature [Min]	Operating Temperature [Max]	Ratio - Input:Output [custom]	Ratio - Input:Output [custom]	Number of Circuits	Supplier Device Package	Mounting Type	Type	Package / Case [y]	Package / Case [y]	Package / Case	Output	Voltage - Supply [Max]	Voltage - Supply [Min]	Frequency - Max [Max]
Texas Instruments CDCVF2310PWR	-40 °C	85 °C	1	10	1	24-TSSOP	Surface Mount	Fanout Buffer (Distribution)	4.4 mm	0.173 "	24-TSSOP	LVTTL	3.6 V	2.3 V	200 MHz
Texas Instruments CDCVF2310PWRG4	-40 °C	85 °C	1	10	1	24-TSSOP	Surface Mount	Fanout Buffer (Distribution)	4.4 mm	0.173 "	24-TSSOP	LVTTL	3.6 V	2.3 V	200 MHz
Texas Instruments CDCVF2310MPWEP	-55 °C	125 ¯C	1	10	1	24-TSSOP	Surface Mount	Fanout Buffer (Distribution)	4.4 mm	0.173 "	24-TSSOP	LVTTL	3.6 V	2.3 V	200 MHz
Texas Instruments CDCVF2310MPWREP	-55 °C	125 °C	1	10	1	24-TSSOP	Surface Mount	Fanout Buffer (Distribution)	4.4 mm	0.173 "	24-TSSOP	LVTTL	3.6 V	2.3 V	200 MHz

Key Features

• High-Performance 1:10 Clock DriverOperates up to 200 MHz at VDD3.3 VPin-to-Pin Skew < 100 ps at VDD3.3 VVDDRange: 2.3 V to 3.6 VOperating Temperature Range –40°C to 105°CSupports 105ºC Ambient Temperature (seeThermal Considerations)Output Enable Glitch SuppressionDistributes One Clock Input to Two Banks of FiveOutputs25-Ω On-Chip Series Damping ResistorsPackaged in 24-Pin TSSOPHigh-Performance 1:10 Clock DriverOperates up to 200 MHz at VDD3.3 VPin-to-Pin Skew < 100 ps at VDD3.3 VVDDRange: 2.3 V to 3.6 VOperating Temperature Range –40°C to 105°CSupports 105ºC Ambient Temperature (seeThermal Considerations)Output Enable Glitch SuppressionDistributes One Clock Input to Two Banks of FiveOutputs25-Ω On-Chip Series Damping ResistorsPackaged in 24-Pin TSSOP

Description

The CDCVF2310 device is a high-performance, low-skew clock buffer that operates up to 200 MHz. Two banks of five outputs each provide low-skew copies of CLK. After power up, the default state of the outputs is low regardless of the state of the control pins. For normal operation, the outputs of bank 1Y[0:4] or 2Y[0:4] can be placed in a low state when the control pins (1G or 2G, respectively) are held low and a negative clock edge is detected on the CLK input. The outputs of bank 1Y[0:4] or 2Y[0:4] can be switched into the buffer mode when the control pins (1G and 2G) are held high and a negative clock edge is detected on the CLK input. The device operates in a 2.5-V and 3.3-V environment. The built-in output enable glitch suppression ensures a synchronized output enable sequence to distribute full period clock signals. The CDCVF2310 is characterized for operation from –40°C to 85°C. The CDCVF2310 device is a high-performance, low-skew clock buffer that operates up to 200 MHz. Two banks of five outputs each provide low-skew copies of CLK. After power up, the default state of the outputs is low regardless of the state of the control pins. For normal operation, the outputs of bank 1Y[0:4] or 2Y[0:4] can be placed in a low state when the control pins (1G or 2G, respectively) are held low and a negative clock edge is detected on the CLK input. The outputs of bank 1Y[0:4] or 2Y[0:4] can be switched into the buffer mode when the control pins (1G and 2G) are held high and a negative clock edge is detected on the CLK input. The device operates in a 2.5-V and 3.3-V environment. The built-in output enable glitch suppression ensures a synchronized output enable sequence to distribute full period clock signals. The CDCVF2310 is characterized for operation from –40°C to 85°C.