Catalog(2 parts)
| Part | Operating Temperature▲▼ | Operating Temperature▲▼ | Duplex | Voltage - Supply▲▼ | Voltage - Supply▲▼ | Package / Case▲▼ | Package / Case▲▼ | Package / Case | Number of Drivers/Receivers▲▼ | Number of Drivers/Receivers▲▼ | Type | Supplier Device Package | Mounting Type | Receiver Hysteresis▲▼ | Protocol |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
70 °C | 0 °C | Half | 4.75 V | 5.25 V | 0.007499999832361937 m | 0.007493000011891127 m | 24-SOIC | 8 ul | 8 ul | Transceiver | 24-SOIC | Surface Mount | 0.6499999761581421 V | IEEE 488 | |
70 °C | 0 °C | Half | 4.75 V | 5.25 V | 0.007499999832361937 m | 0.007493000011891127 m | 24-SOIC | 8 ul | 8 ul | Transceiver | 24-SOIC | Surface Mount | 0.6499999761581421 V | IEEE 488 |
Key Features
• Meets IEEE Standard 488-1978 (GPIB)8-Channel Bidirectional TransceiverDesigned to Implement Control Bus InterfaceDesigned for MulticontrollersHigh-Speed Advanced Low-Power Schottky CircuitryLow-Power Dissipation...46 mW Max per ChannelFast Propagation Times...20 ns MaxHigh-Impedance PNP InputsReceiver Hysteresis...650 mV TypBus-Terminating Resistors Provided on Driver OutputsNo Loading of Bus When Device Is Powered Down (VCC= 0)Power-Up/Power-Down Protection(Glitch Free)Meets IEEE Standard 488-1978 (GPIB)8-Channel Bidirectional TransceiverDesigned to Implement Control Bus InterfaceDesigned for MulticontrollersHigh-Speed Advanced Low-Power Schottky CircuitryLow-Power Dissipation...46 mW Max per ChannelFast Propagation Times...20 ns MaxHigh-Impedance PNP InputsReceiver Hysteresis...650 mV TypBus-Terminating Resistors Provided on Driver OutputsNo Loading of Bus When Device Is Powered Down (VCC= 0)Power-Up/Power-Down Protection(Glitch Free)
Description
AI
The SN75ALS162 eight-channel general-purpose interface bus (GPIB) transceiver is a monolithic, high-speed, advanced low-power Schottky process device designed to provide the bus-management and data-transfer signals between operating units of a multiple-controller instrumentation system. When combined with the SN75ALS160 octal bus transceiver, the SN75ALS162 provides the complete 16-wire interface for the IEEE 488 bus.
The SN75ALS162 features eight driver-receiver pairs connected in a front-to-back configuration to form input/output (I/O) ports at both the bus and terminal sides. The direction of data through these driver-receiver pairs is determined by the DC, TE, and SC enable signals. The SC input allows the REN and IFC transceivers to be controlled independently.
The driver outputs (GPIB I/O ports) feature active bus-terminating resistor circuits designed to provide a high impedance to the bus when VCC= 0. The drivers are designed to handle loads up to 48 mA of sink current. Each receiver features pnp transistor inputs for high input impedance and hysteresis of 400 mV minimum for increased noise immunity. All receivers have 3-state outputs to present a high impedance to the terminal when disabled.
The SN75ALS162 is characterized for operation from 0°C to 70°C.
H = high level, L = low level, R = receive, T = transmit, X = irrelevant
Direction of data transmission is from the terminal side to the bus side, and the direction of data receiving is from the bus side to the terminal side.
Data transfer is noninverting in both directions.
ATN is a normal transceiver channel that functions additionally as an internal direction control or talk enable for EOI whenever the DC and TE inputs are in the same state. When DC and TE are in opposite states, the ATN channel functions as an independent transceiver only.
The SN75ALS162 eight-channel general-purpose interface bus (GPIB) transceiver is a monolithic, high-speed, advanced low-power Schottky process device designed to provide the bus-management and data-transfer signals between operating units of a multiple-controller instrumentation system. When combined with the SN75ALS160 octal bus transceiver, the SN75ALS162 provides the complete 16-wire interface for the IEEE 488 bus.
The SN75ALS162 features eight driver-receiver pairs connected in a front-to-back configuration to form input/output (I/O) ports at both the bus and terminal sides. The direction of data through these driver-receiver pairs is determined by the DC, TE, and SC enable signals. The SC input allows the REN and IFC transceivers to be controlled independently.
The driver outputs (GPIB I/O ports) feature active bus-terminating resistor circuits designed to provide a high impedance to the bus when VCC= 0. The drivers are designed to handle loads up to 48 mA of sink current. Each receiver features pnp transistor inputs for high input impedance and hysteresis of 400 mV minimum for increased noise immunity. All receivers have 3-state outputs to present a high impedance to the terminal when disabled.
The SN75ALS162 is characterized for operation from 0°C to 70°C.
H = high level, L = low level, R = receive, T = transmit, X = irrelevant
Direction of data transmission is from the terminal side to the bus side, and the direction of data receiving is from the bus side to the terminal side.
Data transfer is noninverting in both directions.
ATN is a normal transceiver channel that functions additionally as an internal direction control or talk enable for EOI whenever the DC and TE inputs are in the same state. When DC and TE are in opposite states, the ATN channel functions as an independent transceiver only.