ADC31RF80 Series
14-Bit, 3-GSPS, RF-Sampling Wideband Receiver and Feedback IC
Manufacturer: Texas Instruments
Catalog(2 parts)
| Part | Type | Supplier Device Package | Operating Temperature▲▼ | Operating Temperature▲▼ | Package / Case | Mounting Type | Data Rate▲▼ | Voltage - Supply▲▼ | Voltage - Supply▲▼ | Number of Drivers/Receivers▲▼ | Number of Drivers/Receivers▲▼ |
|---|---|---|---|---|---|---|---|---|---|---|---|
Receiver | 72-VQFN (10x10) | 85 °C | -40 °C | 72-VFQFN Exposed Pad | Surface Mount | 3221225472 bit/s | 1.2000000476837158 V, 2 V | 1.100000023841858 V, 1.7999999523162842 V | |||
Receiver | 72-VQFN (10x10) | 85 °C | -40 °C | 72-VFQFN Exposed Pad | Surface Mount | 3221225472 bit/s | 1.2000000476837158 V, 2 V | 1.100000023841858 V, 1.7999999523162842 V | 0 ul | 1 ul |
Key Features
• 14-Bit, 3-GSPS ADCNoise Floor: –155 dBFS/HzRF Input Supports Up To 4.0 GHzAperture Jitter: 90 fSSpectral Performance (fIN= 900 MHz, –2 dBFS):SNR: 61.4 dBFSSFDR: 71-dBc HD2, HD3SFDR: 76-dBc Worst SpurSpectral Performance (fIN= 1.85 GHz, –2 dBFS):SNR: 58.5 dBFSSFDR: 65-dBc HD2, HD3SFDR: 75-dBc Worst SpurOn-Chip Digital Down-Converters:Up to 2 DDCs (Dual-Band Mode)Up to 3 Independent NCOs per DDCOn-Chip Input Clamp for Overvoltage ProtectionProgrammable On-Chip Power Detectors With Alarm Pins for AGC SupportOn-Chip DitherOn-Chip Input TerminationInput Full-Scale: 1.35 VPPSupport for Multi-Chip SynchronizationJESD204B Interface:Subclass 1-Based Deterministic Latency4 Lanes Support at 12.5 GbpsTotal Power Dissipation: 3.2 W at 3.0 GSPS72-Pin VQFN Package (10 mm × 10 mm)14-Bit, 3-GSPS ADCNoise Floor: –155 dBFS/HzRF Input Supports Up To 4.0 GHzAperture Jitter: 90 fSSpectral Performance (fIN= 900 MHz, –2 dBFS):SNR: 61.4 dBFSSFDR: 71-dBc HD2, HD3SFDR: 76-dBc Worst SpurSpectral Performance (fIN= 1.85 GHz, –2 dBFS):SNR: 58.5 dBFSSFDR: 65-dBc HD2, HD3SFDR: 75-dBc Worst SpurOn-Chip Digital Down-Converters:Up to 2 DDCs (Dual-Band Mode)Up to 3 Independent NCOs per DDCOn-Chip Input Clamp for Overvoltage ProtectionProgrammable On-Chip Power Detectors With Alarm Pins for AGC SupportOn-Chip DitherOn-Chip Input TerminationInput Full-Scale: 1.35 VPPSupport for Multi-Chip SynchronizationJESD204B Interface:Subclass 1-Based Deterministic Latency4 Lanes Support at 12.5 GbpsTotal Power Dissipation: 3.2 W at 3.0 GSPS72-Pin VQFN Package (10 mm × 10 mm)
Description
AI
The ADC31RF80 device is a 14-bit, 3-GSPS, single-channel telecom receiver and feedback device that supports RF sampling with input frequencies up to 4 GHz and beyond. Designed for high signal-to-noise ratio (SNR), the ADC31RF80 delivers a noise spectral density of –155 dBFS/Hz as well as dynamic range over a large input frequency range. The buffered analog input with on-chip termination provides uniform input impedance across a wide frequency range and minimizes sample-and-hold glitch energy.
The ADC31RF80 comes with a dual-band, digital down-converter (DDC) with up to three independent, 16-bit numerically-controlled oscillators (NCOs) per DDC for phase-coherent frequency hopping. Additionally, the ADC is equipped with front-end peak and RMS power detectors and alarm functions to support external automatic gain control (AGC) algorithms.
The ADC31RF80 supports the JESD204B serial interface with subclass 1-based deterministic latency using data rates up to 12.5 Gbps with up to four lanes. The device is offered in a 72-pin VQFN package (10 mm × 10 mm) and supports the industrial temperature range (–40°C to +85°C).
The ADC31RF80 device is a 14-bit, 3-GSPS, single-channel telecom receiver and feedback device that supports RF sampling with input frequencies up to 4 GHz and beyond. Designed for high signal-to-noise ratio (SNR), the ADC31RF80 delivers a noise spectral density of –155 dBFS/Hz as well as dynamic range over a large input frequency range. The buffered analog input with on-chip termination provides uniform input impedance across a wide frequency range and minimizes sample-and-hold glitch energy.
The ADC31RF80 comes with a dual-band, digital down-converter (DDC) with up to three independent, 16-bit numerically-controlled oscillators (NCOs) per DDC for phase-coherent frequency hopping. Additionally, the ADC is equipped with front-end peak and RMS power detectors and alarm functions to support external automatic gain control (AGC) algorithms.
The ADC31RF80 supports the JESD204B serial interface with subclass 1-based deterministic latency using data rates up to 12.5 Gbps with up to four lanes. The device is offered in a 72-pin VQFN package (10 mm × 10 mm) and supports the industrial temperature range (–40°C to +85°C).