65LVDM176 Series

Half-duplex LVDM transceiver

Catalog(4 parts)

Part	Data Rate▲▼	Protocol	Supplier Device Package	Package / Case▲▼	Package / Case	Voltage - Supply▲▼	Voltage - Supply▲▼	Mounting Type	Type	Duplex	Operating Temperature▲▼	Operating Temperature▲▼	Package / Case▲▼
Texas Instruments SN65LVDM176D 1/1 Transceiver Half LVDS 8-SOIC	419430400 bit/s	LVDS	8-SOIC	0.003899999894201755 m	8-SOIC	3.5999999046325684 V	3 V	Surface Mount	Transceiver	Half	-40 °C	85 °C
Texas Instruments SN65LVDM176DGKR 1/1 Transceiver Half LVDS 8-VSSOP	419430400 bit/s	LVDS		0.0029972000047564507 m	8-MSOP, 8-TSSOP	3.5999999046325684 V	3 V	Surface Mount	Transceiver	Half	-40 °C	85 °C	0.003000000026077032 m
Texas Instruments SN65LVDM176DGKG4 1/1 Transceiver Half LVDS 8-VSSOP	419430400 bit/s	LVDS		0.0029972000047564507 m	8-MSOP, 8-TSSOP	3.5999999046325684 V	3 V	Surface Mount	Transceiver	Half	-40 °C	85 °C	0.003000000026077032 m
Texas Instruments SN65LVDM176DGK 1/1 Transceiver Half LVDS 8-VSSOP	419430400 bit/s	LVDS		0.0029972000047564507 m	8-MSOP, 8-TSSOP	3.5999999046325684 V	3 V	Surface Mount	Transceiver	Half	-40 °C	85 °C	0.003000000026077032 m

Key Features

• Low-Voltage Differential Driver and Receiver for Half-Duplex OperationDesigned for Signaling Rates of 400 Mbit/sESD Protection Exceeds 15 kV on Bus PinsOperates From a Single 3.3-V SupplyLow-Voltage Differential Signaling With Typical Output Voltages of 350 mV and a 50-LoadValid Output With as Little as 50 mV Input Voltage DifferencePropagation Delay TimesDriver: 1.7 ns TypReceiver: 3.7 ns TypPower Dissipation at 200 MHzDriver: 50 mW TypicalReceiver: 60 mW TypicalLVTTL Levels Are 5-V TolerantBus Pins Are High Impedance When Disabled or With VCCLess Than 1.5 VOpen-Circuit Fail-Safe ReceiverSurface-Mount PackagingD Package (SOIC)DGK Package (MSOP)PowerPAD is a trademark of Texas Instruments.Low-Voltage Differential Driver and Receiver for Half-Duplex OperationDesigned for Signaling Rates of 400 Mbit/sESD Protection Exceeds 15 kV on Bus PinsOperates From a Single 3.3-V SupplyLow-Voltage Differential Signaling With Typical Output Voltages of 350 mV and a 50-LoadValid Output With as Little as 50 mV Input Voltage DifferencePropagation Delay TimesDriver: 1.7 ns TypReceiver: 3.7 ns TypPower Dissipation at 200 MHzDriver: 50 mW TypicalReceiver: 60 mW TypicalLVTTL Levels Are 5-V TolerantBus Pins Are High Impedance When Disabled or With VCCLess Than 1.5 VOpen-Circuit Fail-Safe ReceiverSurface-Mount PackagingD Package (SOIC)DGK Package (MSOP)PowerPAD is a trademark of Texas Instruments.

Description

The SN65LVDM176 is a differential line driver and receiver configured as a transceiver that uses low-voltage differential signaling (LVDS) to achieve signaling rates as high as 400 Mbit/s. These circuits are similar to TIA/EIA-644 standard compliant devices (SN65LVDS) counterparts except that the output current of the drivers is doubled. This modification provides a minimum differential output voltage magnitude of 247 mV into a 50-load and allows double-terminated lines and half-duplex operation. The receivers detect a voltage difference of less than 50 mV with up to 1 V of ground potential difference between a transmitter and receiver. The intended application of this device and signaling technique is for half-duplex or multiplex baseband data transmission over controlled impedance media of approximately 100-characteristic impedance. The transmission media may be printed-circuit board traces, backplanes, or cables. (Note: The ultimate rate and distance of data transfer is dependent upon the attenuation characteristics of the media, the noise coupling to the environment, and other application specific characteristics). The SN65LVDM176 is characterized for operation from \x9640°C to 85°C. The SN65LVDM176 is a differential line driver and receiver configured as a transceiver that uses low-voltage differential signaling (LVDS) to achieve signaling rates as high as 400 Mbit/s. These circuits are similar to TIA/EIA-644 standard compliant devices (SN65LVDS) counterparts except that the output current of the drivers is doubled. This modification provides a minimum differential output voltage magnitude of 247 mV into a 50-load and allows double-terminated lines and half-duplex operation. The receivers detect a voltage difference of less than 50 mV with up to 1 V of ground potential difference between a transmitter and receiver. The intended application of this device and signaling technique is for half-duplex or multiplex baseband data transmission over controlled impedance media of approximately 100-characteristic impedance. The transmission media may be printed-circuit board traces, backplanes, or cables. (Note: The ultimate rate and distance of data transfer is dependent upon the attenuation characteristics of the media, the noise coupling to the environment, and other application specific characteristics). The SN65LVDM176 is characterized for operation from \x9640°C to 85°C.