SN74LVC1G125-EP Series
Enhanced product single 1.65-V to 5.5-V buffer with 3-state outputs
Manufacturer: Texas Instruments
Link to Manufacturer Page: https://www.ti.com/
Catalog
Enhanced product single 1.65-V to 5.5-V buffer with 3-state outputs
| Part | Number of Bits per Element | Logic Type | Package / Case | Current - Output High, Low [custom] | Current - Output High, Low [custom] | Operating Temperature [Max] | Operating Temperature [Min] | Voltage - Supply [Max] | Voltage - Supply [Min] | Number of Elements [custom] | Supplier Device Package | Output Type | Mounting Type |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Texas Instruments CLVC1G125IDCKREP | 1 | Buffer, Non-Inverting | 5-TSSOP, SC-70-5, SOT-353 | 32 mA | 32 mA | 85 °C | -40 °C | 5.5 V | 1.65 V | 1 | SC-70-5 | 3-State | Surface Mount |
Texas Instruments CLVC1G125MDCKREP | 1 | Buffer, Non-Inverting | 5-TSSOP, SC-70-5, SOT-353 | 32 mA | 32 mA | 125 °C | -55 C | 5.5 V | 1.65 V | 1 | SC-70-5 | 3-State | Surface Mount |
Key Features
• Controlled BaselineOne Assembly/Test Site, One Fabrication SiteEnhanced Diminishing Manufacturing Sources (DMS) SupportEnhanced Product-Change NotificationQualification Pedigree(1)Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits.Supports 5-V VCCOperationInputs Accept Voltages to 5.5 VMax tpdof 3.7 ns at 3.3 VLow Power Consumption, 10-µA Max ICC±24-mA Output Drive at 3.3 VIoffSupports Partial-Power-Down Mode OperationLatch-Up Performance Exceeds 100 mA Per JESD 78, Class IIESD Protection Exceeds JESD 222000-V Human-Body Model (A114-A)200-V Machine Model (A115-A)1000-V Charged-Device Model (C101)(1)Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits.Controlled BaselineOne Assembly/Test Site, One Fabrication SiteEnhanced Diminishing Manufacturing Sources (DMS) SupportEnhanced Product-Change NotificationQualification Pedigree(1)Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits.Supports 5-V VCCOperationInputs Accept Voltages to 5.5 VMax tpdof 3.7 ns at 3.3 VLow Power Consumption, 10-µA Max ICC±24-mA Output Drive at 3.3 VIoffSupports Partial-Power-Down Mode OperationLatch-Up Performance Exceeds 100 mA Per JESD 78, Class IIESD Protection Exceeds JESD 222000-V Human-Body Model (A114-A)200-V Machine Model (A115-A)1000-V Charged-Device Model (C101)(1)Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits.
Description
AI
This bus buffer gate is designed for 1.65-V to 5.5-V VCCoperation.
The SN74LVC1G125 is a single line driver with a 3-state output. The output is disabled when the output-enable (OE) input is high.
This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
To ensure the high-impedance state during power up or power down,OEshould be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
This bus buffer gate is designed for 1.65-V to 5.5-V VCCoperation.
The SN74LVC1G125 is a single line driver with a 3-state output. The output is disabled when the output-enable (OE) input is high.
This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
To ensure the high-impedance state during power up or power down,OEshould be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.