SN74LVC540A Series

Enhanced product 8-ch, 2-V to 3.6-V inverters with 3-state outputs

Catalog

Enhanced product 8-ch, 2-V to 3.6-V inverters with 3-state outputs

Part	Number of Bits per Element	Voltage - Supply (Maximum)	Voltage - Supply (Minimum)	Number of Elements	Output Type	Current - Output Low	Current - Output High	Mounting Type	Package Name	Logic Type	Grade	Package Length	Package Width	Operating Temperature (Max)	Operating Temperature (Min)	Qualification
Texas Instruments CLVC540AQPWRG4Q1	8 bits	3.6 V	2 V	1	3-State	24 mA	24 mA	Surface Mount	20-TSSOP	Buffer Inverting	Automotive	0.173 in	4.4 mm	125 °C	-40 °C	AEC-Q100
Texas Instruments CLVC540AQDWRG4Q1	8 bits	3.6 V	2 V	1	3-State	24 mA	24 mA	Surface Mount	20-SOIC	Buffer Inverting	Automotive	0.295 in	7.5 mm	125 °C	-40 °C	AEC-Q100
Texas Instruments SN74LVC540ADGVR	8 bits	3.6 V	1.65 V	1	3-State	24 mA	24 mA	Surface Mount	20-TFSOP 20-TVSOP	Buffer Inverting		0.173 in	4.4 mm	125 °C	-40 °C
Texas Instruments SN74LVC540ADBR	8 bits	3.6 V	1.65 V	1	3-State	24 mA	24 mA	Surface Mount	20-SSOP	Buffer Inverting		0.209 in	5.3 mm	125 °C	-40 °C
Texas Instruments SN74LVC540ADWR	8 bits	3.6 V	1.65 V	1	3-State	24 mA	24 mA	Surface Mount	20-SOIC	Buffer Inverting		0.295 in	7.5 mm	125 °C	-40 °C

Catalog

Enhanced product 8-ch, 2-V to 3.6-V inverters with 3-state outputs

Description

The SN74LVC540A-EP octal buffer/driver is designed for 2.7-V to 3.6-V VCCoperation. This device is ideal for driving bus lines or buffer-memory address registers. This device features inputs and outputs on opposite sides of the package that facilitate printed circuit board layout. The 3-state control gate is a 2-input AND gate with active-low inputs so that, if either output-enable (OE1orOE2) input is high, all outputs are in the high-impedance state. Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of this device as a translator in a mixed 3.3-V/5-V system environment. This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. To ensure the high-impedance state during power up or power down,OEshould be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. The SN74LVC540A-EP octal buffer/driver is designed for 2.7-V to 3.6-V VCCoperation. This device is ideal for driving bus lines or buffer-memory address registers. This device features inputs and outputs on opposite sides of the package that facilitate printed circuit board layout. The 3-state control gate is a 2-input AND gate with active-low inputs so that, if either output-enable (OE1orOE2) input is high, all outputs are in the high-impedance state. Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of this device as a translator in a mixed 3.3-V/5-V system environment. This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. To ensure the high-impedance state during power up or power down,OEshould be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.