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PI6CB332001 Series

20-Output PCIe Gen 4/Gen 5/Gen 6 Clock Buffer With On-Chip Termination

Manufacturer: Diodes Inc

Catalog

20-Output PCIe Gen 4/Gen 5/Gen 6 Clock Buffer With On-Chip Termination

Key Features

Supports Intel's DB2000QL Specification
3V Supply Voltage
HCSL Input: 100MHz (typical), Up to 400MHz
20 Differential Low Power HCSL Outputs with On-Chip Termination
Two Output Enable Control ModesTraditional 8 OE# Pins and 20 SMBus BitsSimple 3-Wire Side-Band Interface Real-Time Control
Traditional 8 OE# Pins and 20 SMBus Bits
Simple 3-Wire Side-Band Interface Real-Time Control
SMBus Interface Support
Spread Spectrum Tolerant
Very Low Jitter OutputsDifferential Additive Phase Jitter: DB2000Q <30fs RMSDifferential Additive Phase Jitter: PCIe Gen 4 <30fs RMSDifferential Additive Phase Jitter: PCIe Gen 5 <30fs RMSDifferential Additive Phase Jitter: PCIe Gen 6 <16fs RMSPCIe Gen 1/Gen 2/Gen 3/Gen 4/Gen 5/Gen 6 Compliant
Differential Additive Phase Jitter: DB2000Q <30fs RMS
Differential Additive Phase Jitter: PCIe Gen 4 <30fs RMS
Differential Additive Phase Jitter: PCIe Gen 5 <30fs RMS
Differential Additive Phase Jitter: PCIe Gen 6 <16fs RMS
PCIe Gen 1/Gen 2/Gen 3/Gen 4/Gen 5/Gen 6 Compliant
Differential Output-to-Output Skew: <50ps
Low Propagation Delay: <3ns
Industrial Temperature Support: -40°C to 85°C
Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2)
Halogen and Antimony Free. "Green" Device (Note 3)
For automotive applications requiring specific change control (i.e. parts qualified to AEC-Q100/101/104/200, PPAP capable, and manufactured in IATF 16949 certified facilities), pleasecontact usor your local Diodes representative.https://www.diodes.com/quality/product-definitions/
Packaging (Pb-free & Green):80-lead 6x6mm dual-row aQFN
80-lead 6x6mm dual-row aQFN

Description

AI
The PI6CB332001 is a 20-output very low power PCIe® Gen 1/Gen 2/Gen 3/Gen 4/Gen 5 and Gen 6 clock buffer. It is capable of distributing the reference clocks for UPI, SAS, SATA, and other applications as well. It takes a reference input to fanout twenty 100MHz low power differential HCSL outputs with on-chip terminations. The on-chip termination can save 80 external resistors and make layout easier. OE pins combined with SMBus bits as well as 3-wire side band interface provide easier power management for each output.