74LVC2G240 Series

2-ch, 1.65-V to 5.5-V inverters with 3-state outputs

Catalog

2-ch, 1.65-V to 5.5-V inverters with 3-state outputs

Part	Logic Type	Package Name	Package Length	Package Width	Current - Output High	Current - Output Low	Number of Bits per Element	Output Type	Mounting Type	Operating Temperature (Max)	Operating Temperature (Min)	Package / Case	Voltage - Supply (Minimum)	Voltage - Supply (Maximum)	Number of Elements
Texas Instruments SN74LVC2G240YEPR	Buffer Inverting	8-DSBGA	1.9 mm	0.9 mm	32 mA	32 mA	1 bits	3-State	Surface Mount	125 °C	-40 °C	8-XFBGA DSBGA	1.65 V	5.5 V	2
Texas Instruments SN74LVC2G240YZPR	Buffer Inverting	8-DSBGA			32 mA	32 mA	1 bits	3-State	Surface Mount	125 °C	-40 °C	8-XFBGA DSBGA	1.65 V	5.5 V	2
Texas Instruments 74LVC2G240DCURE4	Buffer Inverting	8-VFSOP 8-VSSOP	0.091 in	2.3 mm	32 mA	32 mA	1 bits	3-State	Surface Mount	125 °C	-40 °C		1.65 V	5.5 V	2
Texas Instruments SN74LVC2G240YEAR	Buffer Inverting	8-XFBGA DSBGA			32 mA	32 mA	1 bits	3-State	Surface Mount	125 °C	-40 °C	8-XFBGA DSBGA	1.65 V	5.5 V	2
Texas Instruments SN74LVC2G240YZAR	Buffer Inverting	8-DSBGA	1.9 mm	0.9 mm	32 mA	32 mA	1 bits	3-State	Surface Mount	125 °C	-40 °C	8-XFBGA DSBGA	1.65 V	5.5 V	2
Texas Instruments 74LVC2G240DCURG4	Buffer Inverting	8-VFSOP 8-VSSOP	0.091 in	2.3 mm	32 mA	32 mA	1 bits	3-State	Surface Mount	125 °C	-40 °C		1.65 V	5.5 V	2
Texas Instruments SN74LVC2G240DCUR	Buffer Inverting	8-VFSOP 8-VSSOP	0.091 in	2.3 mm	32 mA	32 mA	1 bits	3-State	Surface Mount	125 °C	-40 °C		1.65 V	5.5 V	2
Texas Instruments SN74LVC2G240DCTR	Buffer Inverting	8-LSSOP 8-MSOP SM8	0.11 in	2.8 mm	32 mA	32 mA	1 bits	3-State	Surface Mount	125 °C	-40 °C		1.65 V	5.5 V	2

Catalog

2-ch, 1.65-V to 5.5-V inverters with 3-state outputs

Description

This dual buffer driver is designed for 1.65-V to 5.5-V VCCoperation. The SN74LVC2G240 device is designed specifically to improve the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package. This device is organized as two 1-bit buffers/drivers with separate output-enable (OE) inputs. WhenOEis low, the device passes data from the A input to the Y output. WhenOEis high, the outputs are in the high-impedance state. To ensure the high-impedance state during power up or power down,OEshould be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. This dual buffer driver is designed for 1.65-V to 5.5-V VCCoperation. The SN74LVC2G240 device is designed specifically to improve the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package. This device is organized as two 1-bit buffers/drivers with separate output-enable (OE) inputs. WhenOEis low, the device passes data from the A input to the Y output. WhenOEis high, the outputs are in the high-impedance state. To ensure the high-impedance state during power up or power down,OEshould be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.