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74AHC74 Series

Automotive, catalog dual positive-edge-triggered D-type flip-flops with clear and preset

Manufacturer: Texas Instruments

Catalog(15 parts)

PartOperating Temperature▲▼Operating Temperature▲▼Current - Output High, Low▲▼Current - Output High, Low▲▼Max Propagation Delay @ V, Max CL▲▼Package / CasePackage / Case▲▼Package / Case▲▼Mounting TypeTypeTrigger TypeNumber of Bits per Element▲▼Current - Quiescent (Iq)▲▼Input Capacitance▲▼Output TypeVoltage - Supply▲▼Voltage - Supply▲▼FunctionClock Frequency▲▼Number of Elements▲▼Supplier Device PackagePackage / Case▲▼Package / Case▲▼Package / Case▲▼Package / Case▲▼QualificationGradePackage / Case▲▼
Texas Instruments
SN74AHC74N
Flip Flop 2 Element D-Type 1 Bit Positive Edge 14-DIP (0.300", 7.62mm)
-40 °C
125 °C
0.00800000037997961 A
0.00800000037997961 A
9.29999988130703e-9 s
14-DIP
0.007619999814778566 m
0.007619999814778566 m
Through Hole
D-Type
Positive Edge
1 ul
0.0000019999999949504854 A
1.9999999920083944e-12 F
Complementary
2 V
5.5 V
Reset, Set(Preset)
115000000 Hz
2 ul
Texas Instruments
SN74AHC74RGYR
Flip Flop 2 Element D-Type 1 Bit Positive Edge 14-VFQFN Exposed Pad
-40 °C
125 °C
0.00800000037997961 A
0.00800000037997961 A
9.29999988130703e-9 s
14-VFQFN Exposed Pad
Surface Mount
D-Type
Positive Edge
1 ul
0.0000019999999949504854 A
1.9999999920083944e-12 F
Complementary
2 V
5.5 V
Reset, Set(Preset)
115000000 Hz
2 ul
14-VQFN (3.5x3.5)
Texas Instruments
SN74AHC74NSR
Flip Flop 2 Element D-Type 1 Bit Positive Edge 14-SOIC (0.209", 5.30mm Width)
-40 °C
125 °C
0.00800000037997961 A
0.00800000037997961 A
9.29999988130703e-9 s
14-SOIC
Surface Mount
D-Type
Positive Edge
1 ul
0.0000019999999949504854 A
1.9999999920083944e-12 F
Complementary
2 V
5.5 V
Reset, Set(Preset)
115000000 Hz
2 ul
14-SO
0.0052999998442828655 m
0.005308600142598152 m
Texas Instruments
SN74AHC74MPWREP
Flip Flop 2 Element D-Type 1 Bit Positive Edge 14-TSSOP (0.173", 4.40mm Width)
-55 °C
125 °C
0.00800000037997961 A
0.00800000037997961 A
9.29999988130703e-9 s
14-TSSOP
Surface Mount
D-Type
Positive Edge
1 ul
0.0000019999999949504854 A
1.9999999920083944e-12 F
Complementary
2 V
5.5 V
Reset, Set(Preset)
115000000 Hz
2 ul
14-TSSOP
0.004394200164824724 m
0.004399999976158142 m
Texas Instruments
SN74AHC74QDRG4Q1
Flip Flop 2 Element D-Type 1 Bit Positive Edge 14-SOIC (0.154", 3.90mm Width)
-40 °C
125 °C
0.00800000037997961 A
0.00800000037997961 A
9.29999988130703e-9 s
14-SOIC
0.003899999894201755 m
0.003911599982529879 m
Surface Mount
D-Type
Positive Edge
1 ul
0.0000019999999949504854 A
1.9999999920083944e-12 F
Complementary
2 V
5.5 V
Reset, Set(Preset)
115000000 Hz
2 ul
AEC-Q100
Automotive
Texas Instruments
SN74AHC74DBR
Flip Flop 2 Element D-Type 1 Bit Positive Edge 14-SSOP (0.209", 5.30mm Width)
-40 °C
125 °C
0.00800000037997961 A
0.00800000037997961 A
9.29999988130703e-9 s
14-SSOP
0.0052999998442828655 m
Surface Mount
D-Type
Positive Edge
1 ul
0.0000019999999949504854 A
1.9999999920083944e-12 F
Complementary
2 V
5.5 V
Reset, Set(Preset)
115000000 Hz
2 ul
14-SSOP
0.005308600142598152 m
Texas Instruments
SN74AHC74PW
Flip Flop 2 Element D-Type 1 Bit Positive Edge 14-TSSOP (0.173", 4.40mm Width)
-40 °C
125 °C
0.00800000037997961 A
0.00800000037997961 A
9.29999988130703e-9 s
14-TSSOP
Surface Mount
D-Type
Positive Edge
1 ul
0.0000019999999949504854 A
1.9999999920083944e-12 F
Complementary
2 V
5.5 V
Reset, Set(Preset)
115000000 Hz
2 ul
14-TSSOP
0.004394200164824724 m
0.004399999976158142 m
Texas Instruments
SN74AHC74QPWRG4Q1
Flip Flop 2 Element D-Type 1 Bit Positive Edge 14-TSSOP (0.173", 4.40mm Width)
-40 °C
125 °C
0.00800000037997961 A
0.00800000037997961 A
9.29999988130703e-9 s
14-TSSOP
Surface Mount
D-Type
Positive Edge
1 ul
0.0000019999999949504854 A
1.9999999920083944e-12 F
Complementary
2 V
5.5 V
Reset, Set(Preset)
115000000 Hz
2 ul
14-TSSOP
0.004394200164824724 m
0.004399999976158142 m
AEC-Q100
Automotive
Texas Instruments
SN74AHC74DGVR
Flip Flop 2 Element D-Type 1 Bit Positive Edge 14-TFSOP (0.173", 4.40mm Width)
-40 °C
125 °C
0.00800000037997961 A
0.00800000037997961 A
9.29999988130703e-9 s
14-TFSOP
Surface Mount
D-Type
Positive Edge
1 ul
0.0000019999999949504854 A
1.9999999920083944e-12 F
Complementary
2 V
5.5 V
Reset, Set(Preset)
115000000 Hz
2 ul
0.004399999976158142 m
Texas Instruments
SN74AHC74QPWRQ1
Flip Flop 2 Element D-Type 1 Bit Positive Edge 14-TSSOP (0.173", 4.40mm Width)
-40 °C
125 °C
0.00800000037997961 A
0.00800000037997961 A
9.29999988130703e-9 s
14-TSSOP
Surface Mount
D-Type
Positive Edge
1 ul
0.0000019999999949504854 A
1.9999999920083944e-12 F
Complementary
2 V
5.5 V
Reset, Set(Preset)
115000000 Hz
2 ul
14-TSSOP
0.004394200164824724 m
0.004399999976158142 m
AEC-Q100
Automotive
Texas Instruments
SN74AHC74MDREP
Flip Flop 2 Element D-Type 1 Bit Positive Edge 14-SOIC (0.154", 3.90mm Width)
-55 °C
125 °C
0.00800000037997961 A
0.00800000037997961 A
9.29999988130703e-9 s
14-SOIC
0.003899999894201755 m
0.003911599982529879 m
Surface Mount
D-Type
Positive Edge
1 ul
0.0000019999999949504854 A
1.9999999920083944e-12 F
Complementary
2 V
5.5 V
Reset, Set(Preset)
115000000 Hz
2 ul
Texas Instruments
SN74AHC74D
Flip Flop 2 Element D-Type 1 Bit Positive Edge 14-SOIC (0.154", 3.90mm Width)
-40 °C
125 °C
0.00800000037997961 A
0.00800000037997961 A
6.100000060627053e-9 s
14-SOIC
0.003899999894201755 m
0.003911599982529879 m
Surface Mount
D-Type
Positive Edge
1 ul
0.0000019999999949504854 A
1.9999999920083944e-12 F
Complementary
2 V
5.5 V
Reset, Set(Preset)
115000000 Hz
2 ul
Texas Instruments
SN74AHC74PWRG4
Flip Flop 2 Element D-Type 1 Bit Positive Edge 14-TSSOP (0.173", 4.40mm Width)
-40 °C
125 °C
0.00800000037997961 A
0.00800000037997961 A
9.29999988130703e-9 s
14-TSSOP
Surface Mount
D-Type
Positive Edge
1 ul
0.0000019999999949504854 A
1.9999999920083944e-12 F
Complementary
2 V
5.5 V
Reset, Set(Preset)
115000000 Hz
2 ul
14-TSSOP
0.004394200164824724 m
0.004399999976158142 m
Texas Instruments
SN74AHC74PWG4
Flip Flop 2 Element D-Type 1 Bit Positive Edge 14-TSSOP (0.173", 4.40mm Width)
-40 °C
125 °C
0.00800000037997961 A
0.00800000037997961 A
9.29999988130703e-9 s
14-TSSOP
Surface Mount
D-Type
Positive Edge
1 ul
0.0000019999999949504854 A
1.9999999920083944e-12 F
Complementary
2 V
5.5 V
Reset, Set(Preset)
115000000 Hz
2 ul
14-TSSOP
0.004394200164824724 m
0.004399999976158142 m
Texas Instruments
SN74AHC74PWR
Flip Flop 2 Element D-Type 1 Bit Positive Edge 14-TSSOP (0.173", 4.40mm Width)
-40 °C
125 °C
0.00800000037997961 A
0.00800000037997961 A
9.29999988130703e-9 s
14-TSSOP
Surface Mount
D-Type
Positive Edge
1 ul
0.0000019999999949504854 A
1.9999999920083944e-12 F
Complementary
2 V
5.5 V
Reset, Set(Preset)
115000000 Hz
2 ul
14-TSSOP
0.004394200164824724 m
0.004399999976158142 m

Key Features

• AEC-Q100 qualified for automotive applications:Device temperature grade 1: -40°C to +125°CDevice HBM ESD classification level 2Device CDM ESD classification level C4BAvailable in wettable flank QFN packageOperating range 2V to 5.5V VCCLatch-up performance exceeds 250mA per JESD 17AEC-Q100 qualified for automotive applications:Device temperature grade 1: -40°C to +125°CDevice HBM ESD classification level 2Device CDM ESD classification level C4BAvailable in wettable flank QFN packageOperating range 2V to 5.5V VCCLatch-up performance exceeds 250mA per JESD 17

Description

AI
The SN74AHC74Q-Q1 dual positive-edge-triggered device is a D-type flip-flop. A low level at the preset (PRE) or clear (CLR) inputs sets or resets the outputs, regardless of the levels of the other inputs. When PRE and CLR are inactive (high), data at the data (D) input meeting the setup time requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without affecting the levels at the outputs. The SN74AHC74Q-Q1 dual positive-edge-triggered device is a D-type flip-flop. A low level at the preset (PRE) or clear (CLR) inputs sets or resets the outputs, regardless of the levels of the other inputs. When PRE and CLR are inactive (high), data at the data (D) input meeting the setup time requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without affecting the levels at the outputs.