74AUC16244 Series

16-ch, 0.8-V to 2.7-V high speed buffers with 3-state outputs

Catalog

16-ch, 0.8-V to 2.7-V high speed buffers with 3-state outputs

Part	Logic Type	Voltage - Supply (Minimum)	Voltage - Supply (Maximum)	Number of Bits per Element	Current - Output High	Current - Output Low	Package Width	Package Name	Package Length	Operating Temperature (Max)	Operating Temperature (Min)	Output Type	Mounting Type	Number of Elements	Package / Case
Texas Instruments SN74AUC16244GQLR	Buffer Non-Inverting	0.8 V	2.7 V	4 bits	9 mA	9 mA	4.5 mm	56-BGA Microstar Junior	7 mm	85 °C	-40 °C	3-State	Surface Mount	4	56-VFBGA
Texas Instruments SN74AUC16244ZQLR	Buffer Non-Inverting	0.8 V	2.7 V	4 bits	9 mA	9 mA	4.5 mm	56-BGA Microstar Junior	7 mm	85 °C	-40 °C	3-State	Surface Mount	4	56-VFBGA
Texas Instruments SN74AUC16244DGGR	Buffer Non-Inverting	0.8 V	2.7 V	4 bits	9 mA	9 mA	6.1 mm	48-TFSOP 48-TSSOP	0.24 in	85 °C	-40 °C	3-State	Surface Mount	4

Catalog

16-ch, 0.8-V to 2.7-V high speed buffers with 3-state outputs

Description

This 16-bit buffer/driver is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCCoperation. The SN74AUC16244 is designed specifically toimprove the performance and density of 3-statememory address drivers, clock drivers, and bus-oriented receivers and transmitters. The device can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. It provides true outputs and symmetrical active-low output-enable (OE) inputs. To ensure the high-impedance state during power up or power down,OEshould be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. This 16-bit buffer/driver is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCCoperation. The SN74AUC16244 is designed specifically toimprove the performance and density of 3-statememory address drivers, clock drivers, and bus-oriented receivers and transmitters. The device can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. It provides true outputs and symmetrical active-low output-enable (OE) inputs. To ensure the high-impedance state during power up or power down,OEshould be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.