74ABT240 Series

8-ch, 4.5-V to 5.5-V inverters with TTL-compatible CMOS inputs and 3-state outputs

Catalog

8-ch, 4.5-V to 5.5-V inverters with TTL-compatible CMOS inputs and 3-state outputs

Part	Current - Output High	Current - Output Low	Voltage - Supply (Maximum)	Voltage - Supply (Minimum)	Mounting Type	Number of Elements	Operating Temperature (Max)	Operating Temperature (Min)	Package Length	Package Name	Package Width	Output Type	Number of Bits per Element	Logic Type
Texas Instruments SN74ABT240AN	32 mA	64 mA	5.5 V	4.5 V	Through Hole	2	85 °C	-40 °C	0.3 in	20-DIP 20-PDIP	7.62 mm	3-State	4 bits	Buffer Inverting
Texas Instruments SN74ABT240ADW	32 mA	64 mA	5.5 V	4.5 V	Surface Mount	2	85 °C	-40 °C	0.295 in	20-SOIC	7.5 mm	3-State	4 bits	Buffer Inverting
Texas Instruments SN74ABT240APWR	32 mA	64 mA	5.5 V	4.5 V	Surface Mount	2	85 °C	-40 °C	0.173 in	20-TSSOP	4.4 mm	3-State	4 bits	Buffer Inverting
Texas Instruments SN74ABT240ADBLE
Texas Instruments SN74ABT240ADBRG4	32 mA	64 mA	5.5 V	4.5 V	Surface Mount	2	85 °C	-40 °C	0.209 in	20-SSOP	5.3 mm	3-State	4 bits	Buffer Inverting
Texas Instruments SN74ABT240ADWR	32 mA	64 mA	5.5 V	4.5 V	Surface Mount	2	85 °C	-40 °C	0.295 in	20-SOIC	7.5 mm	3-State	4 bits	Buffer Inverting
Texas Instruments SN74ABT240ANSR	32 mA	64 mA	5.5 V	4.5 V	Surface Mount	2	85 °C	-40 °C	0.209 in	20-SO 20-SOIC	5.3 mm	3-State	4 bits	Buffer Inverting
Texas Instruments SN74ABT240ADWRG4	32 mA	64 mA	5.5 V	4.5 V	Surface Mount	2	85 °C	-40 °C	0.295 in	20-SOIC	7.5 mm	3-State	4 bits	Buffer Inverting
Texas Instruments SN74ABT240APW	32 mA	64 mA	5.5 V	4.5 V	Surface Mount	2	85 °C	-40 °C	0.173 in	20-TSSOP	4.4 mm	3-State	4 bits	Buffer Inverting
Texas Instruments SN74ABT240APWLE

Catalog

8-ch, 4.5-V to 5.5-V inverters with TTL-compatible CMOS inputs and 3-state outputs

Description

These octal buffers and line drivers are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. Together with the SN54ABT241, SN74ABT241A, SN54ABT244, and SN74ABT244A, these devices provide the choice of selected combinations of inverting and noninverting outputs, symmetrical active-low output-enable (OE)\ inputs, and complementary OE and OE\ inputs. The SN54ABT240 and SN74ABT240A are organized as two 4-bit buffers/line drivers with separate OE\ inputs. When OE\ is low, the devices pass inverted data from the A inputs to the Y outputs. When OE\ is high, the outputs are in the high-impedance state. This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. To ensure the high-impedance state during power up or power down, OE\ should be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. These octal buffers and line drivers are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. Together with the SN54ABT241, SN74ABT241A, SN54ABT244, and SN74ABT244A, these devices provide the choice of selected combinations of inverting and noninverting outputs, symmetrical active-low output-enable (OE)\ inputs, and complementary OE and OE\ inputs. The SN54ABT240 and SN74ABT240A are organized as two 4-bit buffers/line drivers with separate OE\ inputs. When OE\ is low, the devices pass inverted data from the A inputs to the Y outputs. When OE\ is high, the outputs are in the high-impedance state. This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. To ensure the high-impedance state during power up or power down, OE\ should be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.