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CLVC1G126 Series

Enhanced product single 1.65-V to 5.5-V buffer with 3-state outputs

Manufacturer: Texas Instruments
Link to Manufacturer Page: https://www.ti.com/

Catalog

Enhanced product single 1.65-V to 5.5-V buffer with 3-state outputs

PartLogic TypePackage / CaseOutput TypeMounting TypeOperating Temperature [Max]Operating Temperature [Min]Current - Output High, Low [custom]Current - Output High, Low [custom]Voltage - Supply [Max]Voltage - Supply [Min]Supplier Device PackageNumber of Bits per ElementNumber of Elements [custom]
Texas Instruments
CLVC1G126IDCKREP
Buffer, Non-Inverting
5-TSSOP, SC-70-5, SOT-353
3-State
Surface Mount
85 °C
-40 °C
32 mA
32 mA
5.5 V
1.65 V
SC-70-5
1
1

Key Features

Controlled BaselineOne Assembly/Test Site, One Fabrication SiteEnhanced Diminishing Manufacturing Sources (DMS) SupportEnhanced Product-Change NotificationQualification PedigreeSupports 5-V VCCOperationInputs Accept Voltages to 5.5 VMax tpdof 3.7 ns at 3.3 VLow Power Consumption, 10-µA Max ICC±24-mA Output Drive at 3.3 VIoffSupports Partial-Power-Down Mode OperationLatch-Up Performance Exceeds 100 mA Per JESD 78, Class IIESD Protection Exceeds JESD 222000-V Human-Body Model (A114-A)200-V Machine Model (A115-A)1000-V Charged-Device Model (C101)Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits.Controlled BaselineOne Assembly/Test Site, One Fabrication SiteEnhanced Diminishing Manufacturing Sources (DMS) SupportEnhanced Product-Change NotificationQualification PedigreeSupports 5-V VCCOperationInputs Accept Voltages to 5.5 VMax tpdof 3.7 ns at 3.3 VLow Power Consumption, 10-µA Max ICC±24-mA Output Drive at 3.3 VIoffSupports Partial-Power-Down Mode OperationLatch-Up Performance Exceeds 100 mA Per JESD 78, Class IIESD Protection Exceeds JESD 222000-V Human-Body Model (A114-A)200-V Machine Model (A115-A)1000-V Charged-Device Model (C101)Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits.

Description

AI
This single bus buffer gate is designed for 1.65-V to 5.5-V VCCoperation. The SN74LVC1G126 is a single line driver with a 3-state output. The output is disabled when the output-enable (OE) input is low. To ensure the high-impedance state during power up or power down, OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver. This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. This single bus buffer gate is designed for 1.65-V to 5.5-V VCCoperation. The SN74LVC1G126 is a single line driver with a 3-state output. The output is disabled when the output-enable (OE) input is low. To ensure the high-impedance state during power up or power down, OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver. This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.