Catalog(19 parts)
Part | Supplier Device Package | Number of Elements▲▼ | Operating Temperature▲▼ | Operating Temperature▲▼ | Current - Output High, Low▲▼ | Current - Output High, Low▲▼ | Mounting Type | Voltage - Supply▲▼ | Voltage - Supply▲▼ | Number of Bits per Element▲▼ | Output Type | Package / Case▲▼ | Package / Case▲▼ | Package / Case |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Texas Instruments SN74LV245APWTTransceiver, Non-Inverting 1 Element 8 Bit per Element 3-State Output 20-TSSOP | 20-TSSOP | 1 ul | -40 °C | 125 °C | 0.01600000075995922 A | 0.01600000075995922 A | Surface Mount | 2 V | 5.5 V | 8 ul | 3-State | 0.004394200164824724 m | 0.004399999976158142 m | 20-TSSOP |
Texas Instruments SN74LV245ATNSTransceiver, Non-Inverting 1 Element 8 Bit per Element 3-State Output 20-SO | 20-SO | 1 ul | -40 °C | 125 °C | 0.01600000075995922 A | 0.01600000075995922 A | Surface Mount | 4.5 V | 5.5 V | 8 ul | 3-State | 0.0052999998442828655 m, 0.005308600142598152 m | 20-SOIC | |
Texas Instruments SN74LV245ADWTransceiver, Non-Inverting 1 Element 8 Bit per Element 3-State Output 20-SOIC | 20-SOIC | 1 ul | -40 °C | 125 °C | 0.01600000075995922 A | 0.01600000075995922 A | Surface Mount | 2 V | 5.5 V | 8 ul | 3-State | 0.007493000011891127 m, 0.007499999832361937 m | 20-SOIC | |
Texas Instruments SN74LV245ATDWRTransceiver, Non-Inverting 1 Element 8 Bit per Element 3-State Output 20-SOIC | 20-SOIC | 1 ul | -40 °C | 125 °C | 0.01600000075995922 A | 0.01600000075995922 A | Surface Mount | 4.5 V | 5.5 V | 8 ul | 3-State | 0.007493000011891127 m, 0.007499999832361937 m | 20-SOIC | |
Texas Instruments SN74LV245ATPWTransceiver, Non-Inverting 1 Element 8 Bit per Element 3-State Output 20-TSSOP | 20-TSSOP | 1 ul | -40 °C | 125 °C | 0.01600000075995922 A | 0.01600000075995922 A | Surface Mount | 4.5 V | 5.5 V | 8 ul | 3-State | 0.004394200164824724 m | 0.004399999976158142 m | 20-TSSOP |
Texas Instruments SN74LV245ATRGYRTransceiver, Non-Inverting 1 Element 8 Bit per Element 3-State Output 20-VQFN (3.5x4.5) | 20-VQFN (3.5x4.5) | 1 ul | -40 °C | 125 °C | 0.01600000075995922 A | 0.01600000075995922 A | Surface Mount | 4.5 V | 5.5 V | 8 ul | 3-State | 20-VFQFN Exposed Pad | ||
Texas Instruments SN74LV245ATNSE4Transceiver, Non-Inverting 1 Element 8 Bit per Element 3-State Output 20-SO | 20-SO | 1 ul | -40 °C | 125 °C | 0.01600000075995922 A | 0.01600000075995922 A | Surface Mount | 4.5 V | 5.5 V | 8 ul | 3-State | 0.0052999998442828655 m, 0.005308600142598152 m | 20-SOIC | |
Texas Instruments SN74LV245APWRG3Transceiver, Non-Inverting 1 Element 8 Bit per Element 3-State Output 20-TSSOP | 20-TSSOP | 1 ul | -40 °C | 125 °C | 0.01600000075995922 A | 0.01600000075995922 A | Surface Mount | 2 V | 5.5 V | 8 ul | 3-State | 0.004394200164824724 m | 0.004399999976158142 m | 20-TSSOP |
Texas Instruments SN74LV245ADWRTransceiver, Non-Inverting 1 Element 8 Bit per Element 3-State Output 20-SOIC | 20-SOIC | 1 ul | -40 °C | 125 °C | 0.01600000075995922 A | 0.01600000075995922 A | Surface Mount | 2 V | 5.5 V | 8 ul | 3-State | 0.007493000011891127 m, 0.007499999832361937 m | 20-SOIC | |
Texas Instruments SN74LV245ANSRTransceiver, Non-Inverting 1 Element 8 Bit per Element 3-State Output 20-SO | 20-SO | 1 ul | -40 °C | 125 °C | 0.01600000075995922 A | 0.01600000075995922 A | Surface Mount | 2 V | 5.5 V | 8 ul | 3-State | 0.0052999998442828655 m, 0.005308600142598152 m | 20-SOIC | |
Texas Instruments SN74LV245ATDBRTransceiver, Non-Inverting 1 Element 8 Bit per Element 3-State Output 20-SSOP | 20-SSOP | 1 ul | -40 °C | 125 °C | 0.01600000075995922 A | 0.01600000075995922 A | Surface Mount | 4.5 V | 5.5 V | 8 ul | 3-State | 0.0052999998442828655 m, 0.005308600142598152 m | 20-SSOP | |
Texas Instruments SN74LV245APWTransceiver, Non-Inverting 1 Element 8 Bit per Element 3-State Output 20-TSSOP | 20-TSSOP | 1 ul | -40 °C | 125 °C | 0.01600000075995922 A | 0.01600000075995922 A | Surface Mount | 2 V | 5.5 V | 8 ul | 3-State | 0.004394200164824724 m | 0.004399999976158142 m | 20-TSSOP |
Texas Instruments SN74LV245ADBRTransceiver, Non-Inverting 1 Element 8 Bit per Element 3-State Output 20-SSOP | 20-SSOP | 1 ul | -40 °C | 125 °C | 0.01600000075995922 A | 0.01600000075995922 A | Surface Mount | 2 V | 5.5 V | 8 ul | 3-State | 0.0052999998442828655 m, 0.005308600142598152 m | 20-SSOP | |
Texas Instruments SN74LV245ATDWTransceiver, Non-Inverting 1 Element 8 Bit per Element 3-State Output 20-SOIC | 20-SOIC | 1 ul | -40 °C | 125 °C | 0.01600000075995922 A | 0.01600000075995922 A | Surface Mount | 4.5 V | 5.5 V | 8 ul | 3-State | 0.007493000011891127 m, 0.007499999832361937 m | 20-SOIC | |
Texas Instruments SN74LV245ANSRG4Transceiver, Non-Inverting 1 Element 8 Bit per Element 3-State Output 20-SO | 20-SO | 1 ul | -40 °C | 125 °C | 0.01600000075995922 A | 0.01600000075995922 A | Surface Mount | 2 V | 5.5 V | 8 ul | 3-State | 0.0052999998442828655 m, 0.005308600142598152 m | 20-SOIC | |
Texas Instruments SN74LV245ATPWRTransceiver, Non-Inverting 1 Element 8 Bit per Element 3-State Output 20-TSSOP | 20-TSSOP | 1 ul | -40 °C | 125 °C | 0.01600000075995922 A | 0.01600000075995922 A | Surface Mount | 4.5 V | 5.5 V | 8 ul | 3-State | 0.004394200164824724 m | 0.004399999976158142 m | 20-TSSOP |
Texas Instruments SN74LV245APWRTransceiver, Non-Inverting 1 Element 8 Bit per Element 3-State Output 20-TSSOP | 20-TSSOP | 1 ul | -40 °C | 125 °C | 0.01600000075995922 A | 0.01600000075995922 A | Surface Mount | 2 V | 5.5 V | 8 ul | 3-State | 0.004394200164824724 m | 0.004399999976158142 m | 20-TSSOP |
Texas Instruments SN74LV245APWRE4Transceiver, Non-Inverting 1 Element 8 Bit per Element 3-State Output 20-TSSOP | 20-TSSOP | 1 ul | -40 °C | 125 °C | 0.01600000075995922 A | 0.01600000075995922 A | Surface Mount | 2 V | 5.5 V | 8 ul | 3-State | 0.004394200164824724 m | 0.004399999976158142 m | 20-TSSOP |
Texas Instruments SN74LV245AGQNRTransceiver, Non-Inverting 1 Element 8 Bit per Element 3-State Output 20-BGA MICROSTAR JUNIOR (4x3) | 20-BGA MICROSTAR JUNIOR (4x3) | 1 ul | -40 °C | 85 °C | 0.01600000075995922 A | 0.01600000075995922 A | Surface Mount | 2 V | 5.5 V | 8 ul | 3-State | 20-VFBGA |
Key Features
• Inputs Are TTL-Voltage Compatible4.5-V to 5.5-V VCCOperationTypical tpdof 3.5 ns at 5 VTypical VOLP(Output Ground Bounce) <0.8 Vat VCC= 5 V, TA= 25°CTypical VOHV(Output VOHUndershoot) >2.3 Vat VCC= 5 V, TA= 25°CSupports Mixed-Mode Voltage Operation on All PortsIoffSupports Partial-Power-Down Mode OperationLatch-Up Performance Exceeds 250 mA Per JESD 17ESD Protection Exceeds JESD 222000-V Human-Body Model (A114-A)1000-V Charged-Device Model (C101)Inputs Are TTL-Voltage Compatible4.5-V to 5.5-V VCCOperationTypical tpdof 3.5 ns at 5 VTypical VOLP(Output Ground Bounce) <0.8 Vat VCC= 5 V, TA= 25°CTypical VOHV(Output VOHUndershoot) >2.3 Vat VCC= 5 V, TA= 25°CSupports Mixed-Mode Voltage Operation on All PortsIoffSupports Partial-Power-Down Mode OperationLatch-Up Performance Exceeds 250 mA Per JESD 17ESD Protection Exceeds JESD 222000-V Human-Body Model (A114-A)1000-V Charged-Device Model (C101)
Description
AI
This octal bus transceiver is designed for asynchronous two-way communication between data buses. The control-function implementation minimizes external timing requirements.
The SN74LV245AT allows data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so that the buses are effectively isolated.
To ensure the high-impedance state during power up or power down,OEshould be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
This octal bus transceiver is designed for asynchronous two-way communication between data buses. The control-function implementation minimizes external timing requirements.
The SN74LV245AT allows data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so that the buses are effectively isolated.
To ensure the high-impedance state during power up or power down,OEshould be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.