Zenode.ai Logo

TXS03121 Series

Micropower, single comparator

Manufacturer: Texas Instruments

Catalog(0 parts)

Part
No parts found
Try adjusting your search criteria

Key Features

Low Supply Current: 8 µA (Max)Supply Voltage: 2.5 V to 5.5 VOutput FET Provides Down TranslationSmall Package: SOT-563Latch-Up Performance Exceeds 100 mA Per JESD 78, Class IIESD Performance2500-V Human-Body Model (JESD-A114E)250-V Machine Model(EIA/JESD A115-A)1500-V Charged-Device Model (JESD22-C101-A Level III)Low Supply Current: 8 µA (Max)Supply Voltage: 2.5 V to 5.5 VOutput FET Provides Down TranslationSmall Package: SOT-563Latch-Up Performance Exceeds 100 mA Per JESD 78, Class IIESD Performance2500-V Human-Body Model (JESD-A114E)250-V Machine Model(EIA/JESD A115-A)1500-V Charged-Device Model (JESD22-C101-A Level III)

Description

AI
The TXS03121 is a comparator designed for battery monitoring applications. It can be operated with a voltage of 2.5 V to 5.5 V. The reference voltage is applied to the –IN terminal, whereas the voltage to be monitored is connected to +IN. When the voltage at +IN is greater than the voltage at –IN, the output FET is turned On. When the voltage at +IN is less than the voltage at –IN, the output FET is turned Off. The source (S) of the output FET can be connected to 1.1 V to 3.6 V, which allows the output signal to be level translated to another voltage value. The voltage at V+must be greater than or equal to the voltage at S. The voltage at S must be greater than or equal to the voltage at D (V+≥ VS≥ VD). The TXS03121 is a comparator designed for battery monitoring applications. It can be operated with a voltage of 2.5 V to 5.5 V. The reference voltage is applied to the –IN terminal, whereas the voltage to be monitored is connected to +IN. When the voltage at +IN is greater than the voltage at –IN, the output FET is turned On. When the voltage at +IN is less than the voltage at –IN, the output FET is turned Off. The source (S) of the output FET can be connected to 1.1 V to 3.6 V, which allows the output signal to be level translated to another voltage value. The voltage at V+must be greater than or equal to the voltage at S. The voltage at S must be greater than or equal to the voltage at D (V+≥ VS≥ VD).