CDC2351-EP Series
Enhanced Product 1-line to 10-line clock driver with 3-state outputs
Manufacturer: Texas Instruments
Link to Manufacturer Page: https://www.ti.com/
Catalog
Enhanced Product 1-line to 10-line clock driver with 3-state outputs
| Part | Number of Circuits | Type | Package / Case | Package / Case | Package / Case | Operating Temperature [Min] | Operating Temperature [Max] | Mounting Type | Voltage - Supply [Max] | Voltage - Supply [Min] | Frequency - Max [Max] | Differential - Input:Output [custom] | Differential - Input:Output [custom] | Supplier Device Package | Ratio - Input:Output [custom] | Ratio - Input:Output [custom] | Output |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Texas Instruments CDC2351MDBREP | 1 | Fanout Buffer (Distribution) | 0.209 in | 5.3 mm | 24-SSOP | -55 °C | 125 °C | Surface Mount | 3.6 V | 3 V | 100 MHz | 24-SSOP | 1 | 10 | LVTTL |
Key Features
• Controlled BaselineOne Assembly/Test Site, One Fabrication SiteExtended Temperature Performance of –55°C to 125°CEnhanced Diminishing Manufacturing Sources (DMS) SupportEnhanced Product-Change NotificationQualification PedigreeLow Output Skew, Low Pulse Skew for Clock-Distribution and Clock-Generation ApplicationsOperates at 3.3-V VCCLVTTL-Compatible Inputs and OutputsSupports Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V VCC)Distributes One Clock Input to 10 OutputsOutputs Have Internal Series Damping Resistor to Reduce Transmission Line EffectsDistributed VCCand Ground Pins Reduce Switching NoiseState-of-the-Art EPIC-IIB™ BiCMOS Design Significantly Reduces Power DissipationShrink Small-Outline (DB) PackageComponent qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits.EPIC-IIB is a trademark of Texas Instruments.Controlled BaselineOne Assembly/Test Site, One Fabrication SiteExtended Temperature Performance of –55°C to 125°CEnhanced Diminishing Manufacturing Sources (DMS) SupportEnhanced Product-Change NotificationQualification PedigreeLow Output Skew, Low Pulse Skew for Clock-Distribution and Clock-Generation ApplicationsOperates at 3.3-V VCCLVTTL-Compatible Inputs and OutputsSupports Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V VCC)Distributes One Clock Input to 10 OutputsOutputs Have Internal Series Damping Resistor to Reduce Transmission Line EffectsDistributed VCCand Ground Pins Reduce Switching NoiseState-of-the-Art EPIC-IIB™ BiCMOS Design Significantly Reduces Power DissipationShrink Small-Outline (DB) PackageComponent qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits.EPIC-IIB is a trademark of Texas Instruments.
Description
AI
The CDC2351 is a high-performance clock-driver circuit that distributes one input (A) to 10 outputs (Y) with minimum skew for clock distribution. The output-enable (OE)\ input disables the outputs to a high-impedance state. Each output has an internal series damping resistor to improve signal integrity at the load. The CDC2351 operates at nominal 3.3-V VCC.
The propagation delays are adjusted at the factory using the P0 and P1 pins. The factory adjustments ensure that the part-to-part skew is minimized and is kept within a specified window. Pins P0 and P1 are not intended for customer use and should be connected to GND.
The CDC2351M is characterized for operation over the full military temperature range of –55°C to 125°C.
The CDC2351 is a high-performance clock-driver circuit that distributes one input (A) to 10 outputs (Y) with minimum skew for clock distribution. The output-enable (OE)\ input disables the outputs to a high-impedance state. Each output has an internal series damping resistor to improve signal integrity at the load. The CDC2351 operates at nominal 3.3-V VCC.
The propagation delays are adjusted at the factory using the P0 and P1 pins. The factory adjustments ensure that the part-to-part skew is minimized and is kept within a specified window. Pins P0 and P1 are not intended for customer use and should be connected to GND.
The CDC2351M is characterized for operation over the full military temperature range of –55°C to 125°C.