Catalog(5 parts)
| Part | Current - Quiescent (Iq)▲▼ | Function | Number of Elements▲▼ | Supplier Device Package | Trigger Type | Package / Case | Voltage - Supply▲▼ | Voltage - Supply▲▼ | Input Capacitance▲▼ | Number of Bits per Element▲▼ | Current - Output High, Low▲▼ | Current - Output High, Low▲▼ | Operating Temperature▲▼ | Operating Temperature▲▼ | Type | Max Propagation Delay @ V, Max CL▲▼ | Output Type | Mounting Type | Supplier Device Package▲▼ | Supplier Device Package▲▼ |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Texas Instruments 74LVC1G175DCKRG4Flip Flop 1 Element D-Type 1 Bit Positive Edge 6-TSSOP, SC-88, SOT-363 | 0.000009999999747378752 A | Reset | 1 ul | SC-70-6 | Positive Edge | 6-TSSOP, SC-88, SOT-363 | 5.5 V | 1.649999976158142 V | 2.9999999880125916e-12 F | 1 ul | 0.03200000151991844 A | 0.03200000151991844 A | -40 °C | 125 °C | D-Type | 3.999999886872274e-9 s | Non-Inverted | Surface Mount | ||
0.000009999999747378752 A | Reset | 1 ul | 6-SON | Positive Edge | 6-UFDFN | 5.5 V | 1.649999976158142 V | 2.9999999880125916e-12 F | 1 ul | 0.03200000151991844 A | 0.03200000151991844 A | -40 °C | 125 °C | D-Type | 4.999999969612645e-9 s | Non-Inverted | Surface Mount | 1 ul | 1.4500000476837158 ul | |
0.000009999999747378752 A | Reset | 1 ul | SOT-23-6 | Positive Edge | SOT-23-6 | 5.5 V | 1.649999976158142 V | 2.9999999880125916e-12 F | 1 ul | 0.03200000151991844 A | 0.03200000151991844 A | -40 °C | 125 °C | D-Type | 4.999999969612645e-9 s | Non-Inverted | Surface Mount | |||
Texas Instruments SN74LVC1G175DCKTFlip Flop 1 Element D-Type 1 Bit Positive Edge 6-TSSOP, SC-88, SOT-363 | 0.000009999999747378752 A | Reset | 1 ul | SC-70-6 | Positive Edge | 6-TSSOP, SC-88, SOT-363 | 5.5 V | 1.649999976158142 V | 2.9999999880125916e-12 F | 1 ul | 0.03200000151991844 A | 0.03200000151991844 A | -40 °C | 125 °C | D-Type | 4.999999969612645e-9 s | Non-Inverted | Surface Mount | ||
Texas Instruments SN74LVC1G175DCKRFlip Flop 1 Element D-Type 1 Bit Positive Edge 6-TSSOP, SC-88, SOT-363 | 0.000009999999747378752 A | Reset | 1 ul | SC-70-6 | Positive Edge | 6-TSSOP, SC-88, SOT-363 | 5.5 V | 1.649999976158142 V | 2.9999999880125916e-12 F | 1 ul | 0.03200000151991844 A | 0.03200000151991844 A | -40 °C | 125 °C | D-Type | 4.999999969612645e-9 s | Non-Inverted | Surface Mount |
Key Features
• Available in the Texas InstrumentsNanoFree™ PackageSupports 5-V VCCOperationInputs Accept Voltages to 5.5 VSupports Down Translation to VCCMax tpdof 4.3 ns at 3.3 VLow Power Consumption, 10-µA Max ICC±24-mA Output Drive at 3.3 VIoffSupports Live Insertion, Partial-Power-DownMode, and Back-Drive ProtectionLatch-Up Performance Exceeds 100 mA PerJESD 78, Class IIESD Protection Exceeds JESD 222000-V Human-Body Model (A114-A)200-V Machine Model (A115-A)1000-V Charged-Device Model (C101)Available in the Texas InstrumentsNanoFree™ PackageSupports 5-V VCCOperationInputs Accept Voltages to 5.5 VSupports Down Translation to VCCMax tpdof 4.3 ns at 3.3 VLow Power Consumption, 10-µA Max ICC±24-mA Output Drive at 3.3 VIoffSupports Live Insertion, Partial-Power-DownMode, and Back-Drive ProtectionLatch-Up Performance Exceeds 100 mA PerJESD 78, Class IIESD Protection Exceeds JESD 222000-V Human-Body Model (A114-A)200-V Machine Model (A115-A)1000-V Charged-Device Model (C101)
Description
AI
This single D-type flip-flop is designed for 1.65-V to 5.5-V VCCoperation.
The SN74LVC1G175 device has an asynchronous clear (CLR) input. WhenCLRis high, data from the input pin (D) is transferred to the output pin (Q) on the clock's (CLK) rising edge. WhenCLRis low, Q is forced into the low state, regardless of the clock edge or data on D.
NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.
This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
This single D-type flip-flop is designed for 1.65-V to 5.5-V VCCoperation.
The SN74LVC1G175 device has an asynchronous clear (CLR) input. WhenCLRis high, data from the input pin (D) is transferred to the output pin (Q) on the clock's (CLK) rising edge. WhenCLRis low, Q is forced into the low state, regardless of the clock edge or data on D.
NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.
This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.