74FCT162827 Series

20-ch, 4.5-V to 5.5-V buffers with TTL-compatible CMOS inputs and 3-state outputs

Catalog(5 parts)

Part	Package / Case▲▼	Package / Case▲▼	Package / Case	Current - Output High, Low▲▼	Current - Output High, Low▲▼	Output Type	Number of Elements▲▼	Voltage - Supply▲▼	Voltage - Supply▲▼	Logic Type	Number of Bits per Element▲▼	Supplier Device Package	Operating Temperature▲▼	Operating Temperature▲▼	Mounting Type	Package / Case▲▼	Package / Case▲▼
Texas Instruments CY74FCT162827BTPVC Buffer, Non-Inverting 2 Element 10 Bit per Element 3-State Output 56-SSOP	0.007493000011891127 m	0.007499999832361937 m	56-BSSOP	0.024000000208616257 A	0.024000000208616257 A	3-State	2 ul	5.5 V	4.5 V	Buffer, Non-Inverting	10 ul	56-SSOP	85 °C	-40 °C	Surface Mount
Texas Instruments 74FCT162827CTPACT Buffer, Non-Inverting 2 Element 10 Bit per Element 3-State Output 56-TSSOP			56-TFSOP	0.024000000208616257 A	0.024000000208616257 A	3-State	2 ul	5.5 V	4.5 V	Buffer, Non-Inverting	10 ul	56-TSSOP	85 °C	-40 °C	Surface Mount	0.006099999882280827 m	0.006095999851822853 m
Texas Instruments CY74FCT162827ATPVC Buffer, Non-Inverting 2 Element 10 Bit per Element 3-State Output 56-SSOP	0.007493000011891127 m	0.007499999832361937 m	56-BSSOP	0.024000000208616257 A	0.024000000208616257 A	3-State	2 ul	5.5 V	4.5 V	Buffer, Non-Inverting	10 ul	56-SSOP	85 °C	-40 °C	Surface Mount
Texas Instruments 74FCT162827ATPVCT Buffer, Non-Inverting 2 Element 10 Bit per Element 3-State Output 56-SSOP	0.007493000011891127 m	0.007499999832361937 m	56-BSSOP	0.024000000208616257 A	0.024000000208616257 A	3-State	2 ul	5.5 V	4.5 V	Buffer, Non-Inverting	10 ul	56-SSOP	85 °C	-40 °C	Surface Mount
Texas Instruments 74FCT162827ATPACT Buffer, Non-Inverting 2 Element 10 Bit per Element 3-State Output 56-TSSOP			56-TFSOP	0.024000000208616257 A	0.024000000208616257 A	3-State	2 ul	5.5 V	4.5 V	Buffer, Non-Inverting	10 ul	56-TSSOP	85 °C	-40 °C	Surface Mount	0.006099999882280827 m	0.006095999851822853 m

Key Features

• IoffSupports Partial-Power-Down Mode OperationEdge-rate control circuitry for significantly improved noise characteristicsTypical output skew < 250 psESD > 2000VTSSOP (19.6-mil pitch) and SSOP (25-mil pitch) packagesIndustrial temperature range of -40°C to +85°CVCC= 5V ± 10%CY74FCT16827T Features:64 mA sink current, 32 mA source currentTypical VOLP(ground bounce) <1.0V at VCC= 5V, TA= 25°CCY74FCT162827T Features:Balanced 24 mA output driversReduced system switching noiseTypical VOLP(ground bounce) <0.6V at VCC= 5V, TA= 25°CIoffSupports Partial-Power-Down Mode OperationEdge-rate control circuitry for significantly improved noise characteristicsTypical output skew < 250 psESD > 2000VTSSOP (19.6-mil pitch) and SSOP (25-mil pitch) packagesIndustrial temperature range of -40°C to +85°CVCC= 5V ± 10%CY74FCT16827T Features:64 mA sink current, 32 mA source currentTypical VOLP(ground bounce) <1.0V at VCC= 5V, TA= 25°CCY74FCT162827T Features:Balanced 24 mA output driversReduced system switching noiseTypical VOLP(ground bounce) <0.6V at VCC= 5V, TA= 25°C

Description

The CY74FCT16827T 20-bit buffer/line driver and the CY74FCT162827T 20-bit buffer/line driver provide high-performance bus interface buffering for wide data/address paths or buses carrying parity. These parts can be used as a single 20-bit buffer or two 10-bit buffers. Each 10-bit buffer has a pair of NANDed OE\ for increased flexibility. This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The CY74FCT16827T is ideally suited for driving high-capacitance loads and low-impedance backplanes. The CY74FCT162827T has 24-mA balanced output drivers with current-limiting resistors in the outputs. This reduces the need for external terminating resistors and provides for minimal undershoot and reduced ground bounce. The CY74FCT162827T is ideal for driving transmission lines. The CY74FCT16827T 20-bit buffer/line driver and the CY74FCT162827T 20-bit buffer/line driver provide high-performance bus interface buffering for wide data/address paths or buses carrying parity. These parts can be used as a single 20-bit buffer or two 10-bit buffers. Each 10-bit buffer has a pair of NANDed OE\ for increased flexibility. This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The CY74FCT16827T is ideally suited for driving high-capacitance loads and low-impedance backplanes. The CY74FCT162827T has 24-mA balanced output drivers with current-limiting resistors in the outputs. This reduces the need for external terminating resistors and provides for minimal undershoot and reduced ground bounce. The CY74FCT162827T is ideal for driving transmission lines.