74S112 Series

Catalog

DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET

Part	Clock Frequency	Number of Bits per Element	Trigger Type	Operating Temperature (Max)	Number of Elements	Type	Current - Output High	Current - Output Low	Max CL	Max Propagation Delay	Mounting Type	Package Length	Package Name	Package Width	Voltage - Supply (Maximum)	Voltage - Supply (Minimum)	Output Type	Current - Quiescent (Iq)	Function
Texas Instruments SN74S112AN	125 MHz	1 bits	Negative Edge	70 °C	2	JK Type	1 mA	20 mA	50 pF	7 ns	Through Hole	0.3 in	16-DIP 16-PDIP	7.62 mm	5.25 V	4.75 V	Complementary	252 mA	Set(Preset) and Reset
Texas Instruments SN74S112ADR	125 MHz	1 bits	Negative Edge	70 °C	2	JK Type	1 mA	20 mA	15 pF	7 ns	Surface Mount	0.154 in	16-SOIC	3.9 mm	5.25 V	4.75 V	Complementary	25 mA	Set(Preset) and Reset
Texas Instruments SN74S112AN3	125 MHz	1 bits	Negative Edge	70 °C	2	JK Type	1 mA	20 mA	50 pF	7 ns	Through Hole	0.3 in	16-DIP 16-PDIP	7.62 mm	5.25 V	4.75 V	Complementary	252 mA	Set(Preset) and Reset