74LV1T125 Series

Single Power Supply, Single BUFFER GATE w/ 3-State Output (active low enable)

Catalog(3 parts)

Part	Number of Elements▲▼	Voltage - Supply▲▼	Voltage - Supply▲▼	Current - Output High, Low▲▼	Current - Output High, Low▲▼	Number of Bits per Element▲▼	Output Type	Mounting Type	Supplier Device Package	Logic Type	Package / Case	Operating Temperature▲▼	Operating Temperature▲▼
Texas Instruments SN74LV1T125DBVRG4 Buffer, Non-Inverting 1 Element 1 Bit per Element 3-State Output SOT-23-5	1 ul	1.600000023841858 V	5.5 V	0.00800000037997961 A	0.00800000037997961 A	1 ul	3-State	Surface Mount	SOT-23-5	Buffer, Non-Inverting	SC-74A, SOT-753	-40 °C	125 °C
Texas Instruments SN74LV1T125DBVR Buffer, Non-Inverting 1 Element 1 Bit per Element 3-State Output SOT-23-5	1 ul	1.600000023841858 V	5.5 V	0.00800000037997961 A	0.00800000037997961 A	1 ul	3-State	Surface Mount	SOT-23-5	Buffer, Non-Inverting	SC-74A, SOT-753	-40 °C	125 °C
Texas Instruments SN74LV1T125DCKR Buffer, Non-Inverting 1 Element 1 Bit per Element 3-State Output SC-70-5	1 ul	1.600000023841858 V	5.5 V	0.00800000037997961 A	0.00800000037997961 A	1 ul	3-State	Surface Mount	SC-70-5	Buffer, Non-Inverting	5-TSSOP, SC-70-5, SOT-353	-40 °C	125 °C

Key Features

• Single-supply voltage translator at 5V, 3.3V, 2.5V, and 1.8V VCCOperating range of 1.8V to 5.5VUp translation:1.2V(1) to 1.8V at 1.8V VCC1.5V(1) to 2.5V at 2.5V VCC1.8V(1) to 3.3V at 3.3V VCC3.3V to 5.0V at 5.0V VCCDown translation:3.3V to 1.8V at 1.8V VCC3.3V to 2.5V at 2.5V VCC5.0V to 3.3V at 3.3V VCCLogic output is referenced to VCCOutput drive:8.0mA output drive at 5V7.0mA output drive at 3.3V3.0mA output drive at 1.8VCharacterized up to 50MHz at 3.3V VCC5.0V tolerance on input pins–40°C to 125°C operating temperature rangeLatch-up performance exceeds 250mA per JESD 17Supports standard logic pinoutsCMOS output B compatible with AUP1G and LVC1G families(1)(1)Refer to the VIH/VIL and output drive for lower VCC condition.Single-supply voltage translator at 5V, 3.3V, 2.5V, and 1.8V VCCOperating range of 1.8V to 5.5VUp translation:1.2V(1) to 1.8V at 1.8V VCC1.5V(1) to 2.5V at 2.5V VCC1.8V(1) to 3.3V at 3.3V VCC3.3V to 5.0V at 5.0V VCCDown translation:3.3V to 1.8V at 1.8V VCC3.3V to 2.5V at 2.5V VCC5.0V to 3.3V at 3.3V VCCLogic output is referenced to VCCOutput drive:8.0mA output drive at 5V7.0mA output drive at 3.3V3.0mA output drive at 1.8VCharacterized up to 50MHz at 3.3V VCC5.0V tolerance on input pins–40°C to 125°C operating temperature rangeLatch-up performance exceeds 250mA per JESD 17Supports standard logic pinoutsCMOS output B compatible with AUP1G and LVC1G families(1)(1)Refer to the VIH/VIL and output drive for lower VCC condition.

Description

The SN74LV1T125 is a single buffer gate with reduced input thresholds to support voltage translation applications. The SN74LV1T125 is a single buffer gate with reduced input thresholds to support voltage translation applications.