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74F373 Series

Octal D-type transparent latches

Manufacturer: Texas Instruments

Catalog(4 parts)

PartMounting TypeIndependent CircuitsLogic TypeOperating TemperatureOperating TemperatureCurrent - Output High, LowDelay Time - PropagationOutput TypePackage / CasePackage / CaseSupplier Device PackageCircuitVoltage - SupplyVoltage - Supply
Texas Instruments
SN74F373DWR
D-Type Transparent Latch 1 Channel 8:8 IC Tri-State 20-SOIC
Surface Mount
1 ul
D-Type Transparent Latch
70 °C
0 °C
0.003000000026077032 A, 0.024000000208616257 A
8.599999823388771e-9 s
Tri-State
0.007493000011891127 m, 0.007499999832361937 m
20-SOIC
20-SOIC
8:8
5.5 V
4.5 V
Texas Instruments
SN74F373DWG4
D-Type Transparent Latch 1 Channel 8:8 IC Tri-State 20-SOIC
Surface Mount
1 ul
D-Type Transparent Latch
70 °C
0 °C
0.003000000026077032 A, 0.024000000208616257 A
8.599999823388771e-9 s
Tri-State
0.007493000011891127 m, 0.007499999832361937 m
20-SOIC
20-SOIC
8:8
5.5 V
4.5 V
Texas Instruments
SN74F373DW
D-Type Transparent Latch 1 Channel 8:8 IC Tri-State 20-SOIC
Surface Mount
1 ul
D-Type Transparent Latch
70 °C
0 °C
0.003000000026077032 A, 0.024000000208616257 A
8.599999823388771e-9 s
Tri-State
0.007493000011891127 m, 0.007499999832361937 m
20-SOIC
20-SOIC
8:8
5.5 V
4.5 V
Texas Instruments
SN74F373DBR
D-Type Transparent Latch 1 Channel 8:8 IC Tri-State 20-SSOP
Surface Mount
1 ul
D-Type Transparent Latch
70 °C
0 °C
0.003000000026077032 A, 0.024000000208616257 A
8.599999823388771e-9 s
Tri-State
0.0052999998442828655 m, 0.005308600142598152 m
20-SSOP
20-SSOP
8:8
5.5 V
4.5 V

Key Features

Eight Latches in a Single Package3-State Bus-Driving True OutputsFull Parallel Access for LoadingBuffered Control InputsPackage Options Include Plastic Small-Outline (SOIC) and Shrink Small-Outline (SSOP) Packages, Ceramic Chip Carriers, and Plastic and Ceramic DIPsEight Latches in a Single Package3-State Bus-Driving True OutputsFull Parallel Access for LoadingBuffered Control InputsPackage Options Include Plastic Small-Outline (SOIC) and Shrink Small-Outline (SSOP) Packages, Ceramic Chip Carriers, and Plastic and Ceramic DIPs

Description

AI
These 8-bit latches feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. The eight latches of the ´F373 are transparent D-type latches. While the latch-enable (LE) input is high, the Q outputs will follow the data (D) inputs. When the latch enable is taken low, the Q outputs are latched at the logic levels set up at the D inputs. A buffered output-enable () input can be used to place the eight outputs in either a normallogic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need for interface or pullup components. The output-enable () input does not affect the internal operations of the latches. Old data can be retained or new data can be entered while the outputs are in the high-impedance state. The SN74F373 is available in TI's shrink small-outline package (DB), which provides the same I/O pin count and functionality of standard small-outline packages in less than half the printed-circuit-board area. The SN54F373 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74F373 is characterized for operation from 0°C to 70°C. These 8-bit latches feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. The eight latches of the ´F373 are transparent D-type latches. While the latch-enable (LE) input is high, the Q outputs will follow the data (D) inputs. When the latch enable is taken low, the Q outputs are latched at the logic levels set up at the D inputs. A buffered output-enable () input can be used to place the eight outputs in either a normallogic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need for interface or pullup components. The output-enable () input does not affect the internal operations of the latches. Old data can be retained or new data can be entered while the outputs are in the high-impedance state. The SN74F373 is available in TI's shrink small-outline package (DB), which provides the same I/O pin count and functionality of standard small-outline packages in less than half the printed-circuit-board area. The SN54F373 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74F373 is characterized for operation from 0°C to 70°C.