ADC3681 Series
Dual-channel, 18-bit, 10-MSPS, low-noise ultra-low-power low-latency ADC
Manufacturer: Texas Instruments
Catalog
Dual-channel, 18-bit, 10-MSPS, low-noise ultra-low-power low-latency ADC
Key Features
• Dual channel ADC18-bit 10, 25, 65 MSPS ADCNoise floor: -160 dBFS/HzLow power and optimized power scaling: 53 mW/ch (10 MSPS) to 94 mW/ch (65 MSPS)Latency: 1-2 clock cycles18-bit, no missing codesINL/DNL: ±7/ ±0.7 LSB (typical)Reference: external or internalInput bandwidth: 900 MHz (3-dB)Industrial temperature range: -40 to +105°COn-chip digital filter (optional)Decimation by 2, 4, 8, 16, 3232-bit NCOSerial LVDS digital interface (2-, 1- and 1/2-wire)Small footprint: 40-QFN (5x5 mm) packageSpectral performance (fIN= 5 MHz):SNR: 83.8 dBFSSFDR: 89 dBc HD2, HD3SFDR: 101 dBFS Worst spurSpectral performance (fIN= 20 MHz):SNR: 82.6 dBFSSFDR: 85 dBc HD2, HD3SFDR: 97 dBFS Worst spurDual channel ADC18-bit 10, 25, 65 MSPS ADCNoise floor: -160 dBFS/HzLow power and optimized power scaling: 53 mW/ch (10 MSPS) to 94 mW/ch (65 MSPS)Latency: 1-2 clock cycles18-bit, no missing codesINL/DNL: ±7/ ±0.7 LSB (typical)Reference: external or internalInput bandwidth: 900 MHz (3-dB)Industrial temperature range: -40 to +105°COn-chip digital filter (optional)Decimation by 2, 4, 8, 16, 3232-bit NCOSerial LVDS digital interface (2-, 1- and 1/2-wire)Small footprint: 40-QFN (5x5 mm) packageSpectral performance (fIN= 5 MHz):SNR: 83.8 dBFSSFDR: 89 dBc HD2, HD3SFDR: 101 dBFS Worst spurSpectral performance (fIN= 20 MHz):SNR: 82.6 dBFSSFDR: 85 dBc HD2, HD3SFDR: 97 dBFS Worst spur
Description
AI
The ADC3681, 82, 83 (ADC368x) is a low noise, ultra-low power 18-bit 65 MSPS high-speed dual channel ADC family. Designed for lowest noise performance, it delivers a noise spectral density of -160 dBFS/Hz combined with excellent linearity and dynamic range. The ADC368x offers excellent DC precision together with IF sampling support which makes it suited for a wide range of applications. High-speed control loops benefit from the short latency as low as only 1 clock cycle. The ADC consumes only 94 mW/ch at 65 Msps and its power consumption scales well with lower sampling rates.
The ADC368x uses a serial LVDS (SLVDS) interface to output the data which minimizes the number of digital interconnects. The device supports two-lane, one-lane and half-lane options. The ADC36xx is a pin to pin compatible family of ADCs with 16 and 18-bit resolution and different speed grades. It comes in a 40-pin QFN package (5 x 5mm) and supports the extended industrial temperature range from -40 to +105⁰C.
The ADC3681, 82, 83 (ADC368x) is a low noise, ultra-low power 18-bit 65 MSPS high-speed dual channel ADC family. Designed for lowest noise performance, it delivers a noise spectral density of -160 dBFS/Hz combined with excellent linearity and dynamic range. The ADC368x offers excellent DC precision together with IF sampling support which makes it suited for a wide range of applications. High-speed control loops benefit from the short latency as low as only 1 clock cycle. The ADC consumes only 94 mW/ch at 65 Msps and its power consumption scales well with lower sampling rates.
The ADC368x uses a serial LVDS (SLVDS) interface to output the data which minimizes the number of digital interconnects. The device supports two-lane, one-lane and half-lane options. The ADC36xx is a pin to pin compatible family of ADCs with 16 and 18-bit resolution and different speed grades. It comes in a 40-pin QFN package (5 x 5mm) and supports the extended industrial temperature range from -40 to +105⁰C.