Catalog(1 parts)
| Part | Interface | Supplier Device Package | Voltage - Supply▲▼ | Voltage - Supply▲▼ | Operating Temperature▲▼ | Operating Temperature▲▼ | Standards | Protocol | Package / Case | Function | Current - Supply▲▼ |
|---|---|---|---|---|---|---|---|---|---|---|---|
Parallel | 28-CSP (5.5x4.5) | 3 V | 5.5 V | 70 °C | 0 °C | USB 1.0, USB 1.1 | USB | 28-TFQFN, CSP | Controller | 0.029999999329447743 A |
Key Features
• Low EMI, low standby current, 24 MHz oscillatorAdvanced DMA mechanismFully static HALT mode with asynchronous wake-up for bus powered operation5V or 3.3V operationImproved input range 3.3V signal voltage regulatorAll unidirectional FIFOs are 64 bytesPower-up reset and startup delay counter simplify system designSimple programming model controlled by external controllerAvailable in two packagesUSBN9603/4SLB: small footprint for new designs and portable applicationsUSBN9603/4-28M: standard package, pin-to-pin compatible with USBN9602-28MLow EMI, low standby current, 24 MHz oscillatorAdvanced DMA mechanismFully static HALT mode with asynchronous wake-up for bus powered operation5V or 3.3V operationImproved input range 3.3V signal voltage regulatorAll unidirectional FIFOs are 64 bytesPower-up reset and startup delay counter simplify system designSimple programming model controlled by external controllerAvailable in two packagesUSBN9603/4SLB: small footprint for new designs and portable applicationsUSBN9603/4-28M: standard package, pin-to-pin compatible with USBN9602-28M
Description
AI
The USBN9603/4 are integrated, USB Node controllers. Other than the reset mechanism for the clock generation circuit, these two devices are identical. All references to \x93the device\x94 in this document refer to both devices, unless otherwise noted.
The device provides enhanced DMA support with many automatic data handling features. It is compatible with USB specification versions 1.0 and 1.1, and is an advanced version of the USBN9602.
The device integrates the required USB transceiver with a 3.3V regulator, a Serial Interface Engine (SIE), USB endpoint (EP) FIFOs, a versatile 8-bit parallel interface, a clock generator and a MICROWIRE/PLUS\x99 interface. Seven endpoint pipes are supported: one for the mandatory control endpoint and six to support interrupt, bulk and isochronous endpoints. Each endpoint pipe has a dedicated FIFO, 8 bytes for the control endpoint and 64 bytes for the other endpoints. The 8-bit parallel interface supports multiplexed and non-multiplexed style CPU address/data buses. A programmable interrupt output scheme allows device configuration for different interrupt signaling requirements.
The USBN9603/4 are integrated, USB Node controllers. Other than the reset mechanism for the clock generation circuit, these two devices are identical. All references to \x93the device\x94 in this document refer to both devices, unless otherwise noted.
The device provides enhanced DMA support with many automatic data handling features. It is compatible with USB specification versions 1.0 and 1.1, and is an advanced version of the USBN9602.
The device integrates the required USB transceiver with a 3.3V regulator, a Serial Interface Engine (SIE), USB endpoint (EP) FIFOs, a versatile 8-bit parallel interface, a clock generator and a MICROWIRE/PLUS\x99 interface. Seven endpoint pipes are supported: one for the mandatory control endpoint and six to support interrupt, bulk and isochronous endpoints. Each endpoint pipe has a dedicated FIFO, 8 bytes for the control endpoint and 64 bytes for the other endpoints. The 8-bit parallel interface supports multiplexed and non-multiplexed style CPU address/data buses. A programmable interrupt output scheme allows device configuration for different interrupt signaling requirements.