TPS536C5 Series
12-phase digital step-down multiphase controller with SVI3 and PMBus for AMD platform
Manufacturer: Texas Instruments
Catalog(1 parts)
| Part | Number of Outputs▲▼ | Voltage - Output▲▼ | Voltage - Output▲▼ | Package / Case | Mounting Type | Voltage - Input▲▼ | Voltage - Input▲▼ | Applications | Supplier Device Package | Operating Temperature▲▼ | Operating Temperature▲▼ |
|---|---|---|---|---|---|---|---|---|---|---|---|
2 ul | 5.5 V | 0.25 V | 48-VFQFN Exposed Pad | Surface Mount | 4.5 V | 17 V | AMD, Controller | 48-VQFN (6x6) | -40 °C | 105 °C |
Key Features
• Input voltage range: 4.5 V to 17 VOutput voltage range: 0.25 V to 5.5 VDual output supporting N+M ≤ 12 phases, M ≤ 6 phasesNative trans-inductor voltage regulator (TLVR) topology supportAMD SVI3 compliantEnhanced D-CAP+™ control to provide superior transient performance with excellent dynamic current sharingProgrammable loop compensationsFlexible phase-firing sequencingIndividual phase current calibrations and reportsDynamic phase shedding with programmable current threshold for optimizing efficiency at light and heavy loadsFast phase-adding for undershoot reductionDriverless configuration for efficient high-frequency switchingFully compatible with TI NexFET™ power stages for high-density solutionsAccurate, adjustable voltage positioningPatented AutoBalance™ phase current balancingSelectable per-phase current limitPMBus™ system interface for telemetry of voltage, current, power, temperature, and fault conditions6.00 × 6.00 mm, 48-pin, 0.4 mm pitch, QFN packageInput voltage range: 4.5 V to 17 VOutput voltage range: 0.25 V to 5.5 VDual output supporting N+M ≤ 12 phases, M ≤ 6 phasesNative trans-inductor voltage regulator (TLVR) topology supportAMD SVI3 compliantEnhanced D-CAP+™ control to provide superior transient performance with excellent dynamic current sharingProgrammable loop compensationsFlexible phase-firing sequencingIndividual phase current calibrations and reportsDynamic phase shedding with programmable current threshold for optimizing efficiency at light and heavy loadsFast phase-adding for undershoot reductionDriverless configuration for efficient high-frequency switchingFully compatible with TI NexFET™ power stages for high-density solutionsAccurate, adjustable voltage positioningPatented AutoBalance™ phase current balancingSelectable per-phase current limitPMBus™ system interface for telemetry of voltage, current, power, temperature, and fault conditions6.00 × 6.00 mm, 48-pin, 0.4 mm pitch, QFN package
Description
AI
The TPS536C5 is a fully AMD SVI3 compliant step-down controller with dual channels, built-in non-volatile memory (NVM), and PMBus™ interface, and is fully compatible with TI NexFET™ smart power stage. Advanced control features such as D-CAP+™ architecture with undershoot reduction (USR) provide fast transient response, low output capacitance, and good current sharing. The device also provides novel phase interleaving strategy and dynamic phase shedding for efficiency improvement at different loads. Adjustable control of VCOREslew rate and voltage positioning round out the AMD SVI3 features. In addition, the device supports the PMBus communication interface for reporting the telemetry of voltage, current, power, temperature, and fault conditions to the systems. All programmable parameters can be configured by the PMBus interface and can be stored in NVM as the new default values to minimize the external component count.
The TPS536C5 device if offered in a thermally enhanced 48-pin QFN packaged and is rated to operate from –40°C to 125°C.
The TPS536C5 is a fully AMD SVI3 compliant step-down controller with dual channels, built-in non-volatile memory (NVM), and PMBus™ interface, and is fully compatible with TI NexFET™ smart power stage. Advanced control features such as D-CAP+™ architecture with undershoot reduction (USR) provide fast transient response, low output capacitance, and good current sharing. The device also provides novel phase interleaving strategy and dynamic phase shedding for efficiency improvement at different loads. Adjustable control of VCOREslew rate and voltage positioning round out the AMD SVI3 features. In addition, the device supports the PMBus communication interface for reporting the telemetry of voltage, current, power, temperature, and fault conditions to the systems. All programmable parameters can be configured by the PMBus interface and can be stored in NVM as the new default values to minimize the external component count.
The TPS536C5 device if offered in a thermally enhanced 48-pin QFN packaged and is rated to operate from –40°C to 125°C.