74AUP1G14 Series

Single 0.8-V to 3.6-V low power inverter with Schmitt-Trigger inputs

Catalog(3 parts)

Part	Logic Type	Current - Quiescent (Max)▲▼	Number of Inputs▲▼	Current - Output High, Low▲▼	Input Logic Level - Low▲▼	Input Logic Level - Low▲▼	Features	Max Propagation Delay @ V, Max CL▲▼	Operating Temperature▲▼	Operating Temperature▲▼	Package / Case	Voltage - Supply▲▼	Voltage - Supply▲▼	Number of Circuits▲▼	Supplier Device Package	Mounting Type	Input Logic Level - High▲▼	Input Logic Level - High▲▼
Texas Instruments SN74AUP1G14DCKT Inverter IC 1 Channel Schmitt Trigger SC-70-5	Inverter	4.999999987376214e-7 A	1 ul	0.004000000189989805 A, 0.004000000189989805 A	0.10000000149011612 V	0.8799999952316284 V	Schmitt Trigger	6.20000006890109e-9 s	-40 °C	85 °C	5-TSSOP, SC-70-5, SOT-353	3.5999999046325684 V	0.800000011920929 V	1 ul	SC-70-5	Surface Mount	2.2899999618530273 V	0.6000000238418579 V
Texas Instruments SN74AUP1G14DPWR Inverter IC 1 Channel Schmitt Trigger 5-X2SON (0.8x0.8)	Inverter	4.999999987376214e-7 A	1 ul	0.004000000189989805 A, 0.004000000189989805 A	0.10000000149011612 V	0.800000011920929 V	Schmitt Trigger	6.20000006890109e-9 s	-40 °C	85 °C	4-XFDFN Exposed Pad	3.5999999046325684 V	0.800000011920929 V	1 ul	5-X2SON (0.8x0.8)	Surface Mount	2.2899999618530273 V	0.6000000238418579 V
Texas Instruments SN74AUP1G14DCKR Inverter IC 1 Channel Schmitt Trigger SC-70-5	Inverter	4.999999987376214e-7 A	1 ul	0.004000000189989805 A, 0.004000000189989805 A	0.10000000149011612 V	0.8799999952316284 V	Schmitt Trigger	6.20000006890109e-9 s	-40 °C	85 °C	5-TSSOP, SC-70-5, SOT-353	3.5999999046325684 V	0.800000011920929 V	1 ul	SC-70-5	Surface Mount	2.2899999618530273 V	0.6000000238418579 V

Key Features

• Latch-Up Performance Exceeds 100 mA Per JESD 78, Class IIESD Performance Tested Per JESD 222000-V Human-Body Model(A114-B, Class II)1000-V Charged-Device Model (C101)Low Static-Power Consumption(ICC= 0.9 µA Maximum)Low Dynamic-Power Consumption(Cpd= 4.4 pF Typical at 3.3 V)Low Input Capacitance (CI= 1.5 pF Typical)Low Noise – Overshoot and Undershoot<10% of VCCIoffSupports Partial-Power-Down Mode OperationIncludes Schmitt-Trigger InputsWide Operating VCCRange of 0.8 V to 3.6 VOptimized for 3.3-V Operation3.6-V I/O Tolerant to Support Mixed-Mode Signal Operationtpd= 4.9 ns Maximum at 3.3 VLatch-Up Performance Exceeds 100 mA Per JESD 78, Class IIESD Performance Tested Per JESD 222000-V Human-Body Model(A114-B, Class II)1000-V Charged-Device Model (C101)Low Static-Power Consumption(ICC= 0.9 µA Maximum)Low Dynamic-Power Consumption(Cpd= 4.4 pF Typical at 3.3 V)Low Input Capacitance (CI= 1.5 pF Typical)Low Noise – Overshoot and Undershoot<10% of VCCIoffSupports Partial-Power-Down Mode OperationIncludes Schmitt-Trigger InputsWide Operating VCCRange of 0.8 V to 3.6 VOptimized for 3.3-V Operation3.6-V I/O Tolerant to Support Mixed-Mode Signal Operationtpd= 4.9 ns Maximum at 3.3 V

Description

The AUP family is TI’s premier solution to the industry’s low power needs in battery-powered portable applications. This family assures a very low static and dynamic power consumption across the entire VCCrange of 0.8 V to 3.6 V, resulting in an increased battery life. This product also maintains excellent signal integrity (seeAUP – The Lowest-Power FamilyandExcellent Signal Integrity). This device functions as an independent gate with Schmitt-trigger inputs, which allows for slow input transition and better switching-noise immunity at the input. This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs when the device is powered down. This inhibits current backflow into the device which prevents damage to the device. The AUP family is TI’s premier solution to the industry’s low power needs in battery-powered portable applications. This family assures a very low static and dynamic power consumption across the entire VCCrange of 0.8 V to 3.6 V, resulting in an increased battery life. This product also maintains excellent signal integrity (seeAUP – The Lowest-Power FamilyandExcellent Signal Integrity). This device functions as an independent gate with Schmitt-trigger inputs, which allows for slow input transition and better switching-noise immunity at the input. This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs when the device is powered down. This inhibits current backflow into the device which prevents damage to the device.