Catalog(2 parts)
| Part | Mounting Type | Package / Case | Voltage - Supply▲▼ | Voltage - Supply▲▼ | Signal Conditioning | Input | Output | Data Rate (Max)▲▼ | Operating Temperature▲▼ | Operating Temperature▲▼ | Delay Time▲▼ | Type | Number of Channels▲▼ | Supplier Device Package |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Surface Mount | 24-WFQFN Exposed Pad | 2.375 V | 3.4649999141693115 V | Input Equalization, Output Pre-Emphasis | CML | CML | 15247133696 bit/s | -40 °C | 85 °C | 6.499999843923021e-11 s | Buffer, ReDriver | 2 ul | 24-WQFN (4x5) | |
Surface Mount | 24-WFQFN Exposed Pad | 2.375 V | 3.4649999141693115 V | Input Equalization, Output Pre-Emphasis | CML | CML | 15247133696 bit/s | -40 °C | 85 °C | 6.499999843923021e-11 s | Buffer, ReDriver | 2 ul | 24-WQFN (4x5) |
Key Features
• Dual Channel, Uni-Directional, Multi-Rate, Dual-Mode Linear Equalizer with Operationup to 14.2Gbps Serial Data Rate for Backplane and Cable InterconnectsLinear Equalization Increases Link Margin for SystemsImplementing Decision Feedback Equalizers (DFE)18dB Analog Equalization at 7.1GHz with 1dB Step Control for Backplane Mode or Cable ModeOutput Linear Dynamic Range: 1200mVBandwidth: >20GHz – TypicalBetter than 15dB Return Loss at 7.1GHzSupports Out-of-Band (OOB) SignalingLow Power: Typically 75mW per Channel at 2.5V VCC24-Terminal QFN (Quad Flatpack, No-Lead) 4mm × 5mm × 0.75mm; 0.5mm Terminal PitchExcellent Impedance Matching to 100Ω Differential PCB Transmission LinesGPIO or I2C Control2.5V and 3.3V±5% Single Power Supply2kV ESD (HBM)Flow-Through Pin-Out Provides Ease of RoutingSmall Package Size Saves Board SpaceDual Channel, Uni-Directional, Multi-Rate, Dual-Mode Linear Equalizer with Operationup to 14.2Gbps Serial Data Rate for Backplane and Cable InterconnectsLinear Equalization Increases Link Margin for SystemsImplementing Decision Feedback Equalizers (DFE)18dB Analog Equalization at 7.1GHz with 1dB Step Control for Backplane Mode or Cable ModeOutput Linear Dynamic Range: 1200mVBandwidth: >20GHz – TypicalBetter than 15dB Return Loss at 7.1GHzSupports Out-of-Band (OOB) SignalingLow Power: Typically 75mW per Channel at 2.5V VCC24-Terminal QFN (Quad Flatpack, No-Lead) 4mm × 5mm × 0.75mm; 0.5mm Terminal PitchExcellent Impedance Matching to 100Ω Differential PCB Transmission LinesGPIO or I2C Control2.5V and 3.3V±5% Single Power Supply2kV ESD (HBM)Flow-Through Pin-Out Provides Ease of RoutingSmall Package Size Saves Board Space
Description
AI
The SN65LVCP1412 is an asynchronous, protocol-agnostic, low latency, two-channel linear equalizer optimized for use up to 14.2Gbps and compensates for losses in backplane or active cable applications. The architecture of SN65LVCP1412 is designed to work with an ASIC or a FPGA with digital equalization employing Decision Feedback Equalizers (DFE). SN65LVCP1412 linear equalizer preserves the shape of the transmitted signal ensuring optimum DFE performance. SN65LVCP1412 provides a low power solution while at the same time extending the effectiveness of DFE.
SN65LVCP1412 is configurable via I2C or GPIO interface. Using the I2C interface of the SN65LVCP1412 enables the user to control independently the Equalization, Path Gain, and Output Dynamic Range for each individual channel. In GPIO mode, Equalization, Path Gain, and Output Dynamic Range can be set for all channels using the GPIO Input pins.
SN65LVCP1412 outputs can be disabled independently via I2C.
The SN65LVCP1412 operates from a single 2.5V or 3.3V power supply.
The package for the SN65LVCP1412 is a 24 pin 4mm x 5mm x 0.75mm QFN (Quad Flatpack, No-lead) lead-free package with 0.5mm pitch, and characterized for operation from –40°C to 85°C.
The SN65LVCP1412 is an asynchronous, protocol-agnostic, low latency, two-channel linear equalizer optimized for use up to 14.2Gbps and compensates for losses in backplane or active cable applications. The architecture of SN65LVCP1412 is designed to work with an ASIC or a FPGA with digital equalization employing Decision Feedback Equalizers (DFE). SN65LVCP1412 linear equalizer preserves the shape of the transmitted signal ensuring optimum DFE performance. SN65LVCP1412 provides a low power solution while at the same time extending the effectiveness of DFE.
SN65LVCP1412 is configurable via I2C or GPIO interface. Using the I2C interface of the SN65LVCP1412 enables the user to control independently the Equalization, Path Gain, and Output Dynamic Range for each individual channel. In GPIO mode, Equalization, Path Gain, and Output Dynamic Range can be set for all channels using the GPIO Input pins.
SN65LVCP1412 outputs can be disabled independently via I2C.
The SN65LVCP1412 operates from a single 2.5V or 3.3V power supply.
The package for the SN65LVCP1412 is a 24 pin 4mm x 5mm x 0.75mm QFN (Quad Flatpack, No-lead) lead-free package with 0.5mm pitch, and characterized for operation from –40°C to 85°C.