CD74ACT112 Series

Catalog

DUAL NEGATIVE-EDGE TRIGGERED J-K FLIP-FLOPS WITH SET AND RESET

Part	Voltage - Supply (Maximum)	Voltage - Supply (Minimum)	Operating Temperature (Max)	Operating Temperature (Min)	Package Width	Package Name	Package Length	Trigger Type	Max CL	Max Propagation Delay	Number of Bits per Element	Mounting Type	Function	Input Capacitance	Current - Output Low	Current - Output High	Clock Frequency	Current - Quiescent (Iq)	Number of Elements	Output Type	Type
Texas Instruments CD74ACT112M	5.5 V	4.5 V	125 °C	-55 °C	3.9 mm	16-SOIC	0.154 in	Negative Edge	50 pF	10.3 ns	1 bits	Surface Mount	Set(Preset) and Reset	10 pF	24 mA	24 mA	100 MHz	4 µA	2	Complementary	JK Type
Texas Instruments CD74ACT112M96	5.5 V	4.5 V	125 °C	-55 °C	3.9 mm	16-SOIC	0.154 in	Negative Edge	50 pF	10.3 ns	1 bits	Surface Mount	Set(Preset) and Reset	10 pF	24 mA	24 mA	100 MHz	4 µA	2	Complementary	JK Type