74F112 Series

Catalog

DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOP WITH CLEAR AND PRESET

Part	Number of Bits per Element	Operating Temperature (Max)	Package Name	Number of Elements	Max Propagation Delay	Max CL	Clock Frequency	Type	Current - Output High	Current - Output Low	Current - Quiescent (Iq)	Output Type	Trigger Type	Package Length	Package Width	Mounting Type	Function	Voltage - Supply (Maximum)	Voltage - Supply (Minimum)
Texas Instruments SN74F112N	1 bits	70 °C	16-DIP 16-PDIP	2	6.5 ns	50 pF	130 MHz	JK Type	1 mA	20 mA	19 mA	Complementary	Negative Edge	0.3 in	7.62 mm	Through Hole	Set(Preset) and Reset	5.5 V	4.5 V
Texas Instruments SN74F112NG4	1 bits	70 °C	16-DIP 16-PDIP	2	6.5 ns	50 pF	130 MHz	JK Type	1 mA	20 mA	19 mA	Complementary	Negative Edge	0.3 in	7.62 mm	Through Hole	Set(Preset) and Reset	5.5 V	4.5 V
Texas Instruments SN74F112D	1 bits	70 °C	16-SOIC	2	6.5 ns	50 pF	130 MHz	JK Type	1 mA	20 mA	19 mA	Complementary	Negative Edge	0.154 in	3.9 mm	Surface Mount	Set(Preset) and Reset	5.5 V	4.5 V
Texas Instruments SN74F112NSR	1 bits	70 °C	16-SO 16-SOIC	2	6.5 ns	50 pF	130 MHz	JK Type	1 mA	20 mA	19 mA	Complementary	Negative Edge	0.209 in	5.3 mm	Surface Mount	Set(Preset) and Reset	5.5 V	4.5 V
Texas Instruments SN74F112NSRG4	1 bits	70 °C	16-SO 16-SOIC	2	6.5 ns	50 pF	130 MHz	JK Type	1 mA	20 mA	19 mA	Complementary	Negative Edge	0.209 in	5.3 mm	Surface Mount	Set(Preset) and Reset	5.5 V	4.5 V