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SN74ACT240 Series

Eight-channel 4.5V-to-5.5V inverters with TTL-compatible CMOS inputs and 3-state outputs

Manufacturer: Texas Instruments
Link to Manufacturer Page: https://www.ti.com/

Catalog

Eight-channel 4.5V-to-5.5V inverters with TTL-compatible CMOS inputs and 3-state outputs

PartOperating Temperature [Max]Operating Temperature [Min]Package / CasePackage / CaseNumber of Bits per ElementMounting TypeVoltage - Supply [Max]Voltage - Supply [Min]Number of Elements [custom]Supplier Device PackageOutput TypeLogic TypeCurrent - Output High, Low [custom]Current - Output High, Low [custom]Package / CaseSupplier Device Package [x]Supplier Device Package [y]
Texas Instruments
SN74ACT240NSR
85 °C
-40 °C
20-SOIC
0.209 in, 5.3 mm
4
Surface Mount
5.5 V
4.5 V
2
20-SO
3-State
Buffer, Inverting
24 mA
24 mA
Texas Instruments
SN74ACT240DBR
85 °C
-40 °C
20-SSOP
0.209 in, 5.3 mm
4
Surface Mount
5.5 V
4.5 V
2
20-SSOP
3-State
Buffer, Inverting
24 mA
24 mA
Texas Instruments
SN74ACT240PWR
85 °C
-40 °C
20-TSSOP
0.173 in
4
Surface Mount
5.5 V
4.5 V
2
20-TSSOP
3-State
Buffer, Inverting
24 mA
24 mA
4.4 mm
Texas Instruments
SN74ACT240DWR
85 °C
-40 °C
20-SOIC
0.295 in, 7.5 mm
4
Surface Mount
5.5 V
4.5 V
2
20-SOIC
3-State
Buffer, Inverting
24 mA
24 mA
Texas Instruments
SN74ACT240RKSR
125 °C
-40 °C
20-VFQFN Exposed Pad
4
Surface Mount
5.5 V
4.5 V
2
20-VQFN
3-State
Buffer, Inverting
24 mA
24 mA
2.5
4.5
Texas Instruments
SN74ACT240PW
85 °C
-40 °C
20-TSSOP
0.173 in
4
Surface Mount
5.5 V
4.5 V
2
20-TSSOP
3-State
Buffer, Inverting
24 mA
24 mA
4.4 mm

Key Features

Operation of 4.5V to 5.5V V CCInputs accept voltages to 5.5VMaximum tpd of 8.5ns at 5VInputs are TTL-compatibleOperation of 4.5V to 5.5V V CCInputs accept voltages to 5.5VMaximum tpd of 8.5ns at 5VInputs are TTL-compatible

Description

AI
These octal buffers and line drivers are designed specifically to improve the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. These octal buffers and line drivers are designed specifically to improve the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters.