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84099012 Series

Octal D-type Flip-Flops With Clear

Manufacturer: Texas Instruments

Catalog(1 parts)

Part
Texas Instruments
84099012A
Flip Flop Element Bit

Key Features

Wide operating voltage range of 2 V to 6 VOutputs can drive up to 10 LSTTL loadsLow power consumption, 80-µA maximum ICCTypical tpd= 12 ns±4-mA output drive at 5 VLow input current of 1-µA maximumContain eight flip-flops with single-rail outputsDirect clear inputIndividual data input to each flip-flopOn products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters.Wide operating voltage range of 2 V to 6 VOutputs can drive up to 10 LSTTL loadsLow power consumption, 80-µA maximum ICCTypical tpd= 12 ns±4-mA output drive at 5 VLow input current of 1-µA maximumContain eight flip-flops with single-rail outputsDirect clear inputIndividual data input to each flip-flopOn products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters.

Description

AI
The SNx4HC273 devices are positive-edge-triggered D-type flip-flops with a direct active low clear (CLR) input. Information at the data (D) inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a particular voltage level and is not related directly to the transition time of the positive-going pulse. When CLK is at either the high or low level, the D input has no effect at the output. The SNx4HC273 devices are positive-edge-triggered D-type flip-flops with a direct active low clear (CLR) input. Information at the data (D) inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a particular voltage level and is not related directly to the transition time of the positive-going pulse. When CLK is at either the high or low level, the D input has no effect at the output.