54HCT240 Series
Military 8-ch, 4.5-V to 5.5-V inverters with TTL-compatible CMOS inputs and 3-state outputs
Manufacturer: Texas Instruments
Catalog(1 parts)
Part | Number of Bits per Element▲▼ | Supplier Device Package | Number of Elements▲▼ | Mounting Type | Current - Output High, Low▲▼ | Current - Output High, Low▲▼ | Package / Case▲▼ | Package / Case▲▼ | Package / Case | Voltage - Supply▲▼ | Voltage - Supply▲▼ | Logic Type | Output Type | Operating Temperature▲▼ | Operating Temperature▲▼ |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
4 ul | 20-CDIP | 2 ul | Through Hole | 0.006000000052154064 A | 0.006000000052154064 A | 0.007619999814778566 m | 0.007619999814778566 m | 20-CDIP | 5.5 V | 4.5 V | Buffer, Inverting | 3-State | -55 °C | 125 °C |
Key Features
• Operating voltage range of 4.5V to 5.5VHigh-current outputs drive up to 15 LSTTL loadsLow power consumption, 80µA max ICCTypical tpd = 12 ns±6mA output drive at 5VLow input current of 1µA maxInputs are TTL-voltage compatible3-state outputs drive bus lines or buffer memory address registersOperating voltage range of 4.5V to 5.5VHigh-current outputs drive up to 15 LSTTL loadsLow power consumption, 80µA max ICCTypical tpd = 12 ns±6mA output drive at 5VLow input current of 1µA maxInputs are TTL-voltage compatible3-state outputs drive bus lines or buffer memory address registers
Description
AI
These octal buffers and line drivers are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The ’HCT240 devices are organized as two 4-bit buffers/drivers with separate output-enable (OE) inputs. When OE is low, the device passes inverted data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state.
These octal buffers and line drivers are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The ’HCT240 devices are organized as two 4-bit buffers/drivers with separate output-enable (OE) inputs. When OE is low, the device passes inverted data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state.