CD54HC194 Series
High Speed CMOS Logic 4-Bit Bidirectional Universal Shift Register
Manufacturer: Texas Instruments
Link to Manufacturer Page: https://www.ti.com/
Catalog
High Speed CMOS Logic 4-Bit Bidirectional Universal Shift Register
| Part | Mounting Type | Supplier Device Package | Function | Package / Case | Voltage - Supply [Min] | Voltage - Supply [Max] | Operating Temperature [Min] | Operating Temperature [Max] | Logic Type | Number of Bits per Element | Number of Elements [custom] | Output Type |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
Texas Instruments CD54HC194F3A | Through Hole | 16-CDIP | Universal | 16-CDIP (0.300", 7.62mm) | 2 V | 6 V | -55 C | 125 °C | Register, Bidirectional | 4 | 1 | Push-Pull |
Key Features
• Four Operating ModesShift Right, Shift Left, Hold and ResetSynchronous Parallel or Serial OperationTypical fMAX= 60MHz at VCC= 5V, CL= 15pF, TA= 25°CAsynchronous Master ResetFanout (Over Temperature Range)Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL LoadsBus Driver Outputs . . . . . . . . . . . . . 15 LSTTL LoadsWide Operating Temperature Range . . . –55°C to 125°CBalanced Propagation Delay and Transition TimesSignificant Power Reduction Compared to LSTTL Logic ICsHC Types2V to 6V OperationHigh Noise Immunity: NIL= 30%, NIH= 30% of VCCat VCC= 5VHCT Types4.5V to 5.5V OperationDirect LSTTL Input Logic Compatibility, VIL= 0.8V (Max), VIH= 2V (Min)CMOS Input Compatibility, Il1µA at VOL, VOHFour Operating ModesShift Right, Shift Left, Hold and ResetSynchronous Parallel or Serial OperationTypical fMAX= 60MHz at VCC= 5V, CL= 15pF, TA= 25°CAsynchronous Master ResetFanout (Over Temperature Range)Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL LoadsBus Driver Outputs . . . . . . . . . . . . . 15 LSTTL LoadsWide Operating Temperature Range . . . –55°C to 125°CBalanced Propagation Delay and Transition TimesSignificant Power Reduction Compared to LSTTL Logic ICsHC Types2V to 6V OperationHigh Noise Immunity: NIL= 30%, NIH= 30% of VCCat VCC= 5VHCT Types4.5V to 5.5V OperationDirect LSTTL Input Logic Compatibility, VIL= 0.8V (Max), VIH= 2V (Min)CMOS Input Compatibility, Il1µA at VOL, VOH
Description
AI
The ’HC194 and CD74HCT194 are 4-bit shift registers with Asynchronous Master Reset (MR)\. In the parallel mode (S0 and S1 are high), data is loaded into the associated flip-flop and appears at the output after the positive transition of the clock input (CP). During parallel loading serial data flow is inhibited. Shift left and shift right are accomplished synchronously on the positive clock edge with serial data entered at the shift left (DSL) serial input for the shift right mode, and at the shift right (DSR) serial input for the shift left mode. Clearing the register is accomplished by a Low applied to the Master Reset (MR)\ pin.
The ’HC194 and CD74HCT194 are 4-bit shift registers with Asynchronous Master Reset (MR)\. In the parallel mode (S0 and S1 are high), data is loaded into the associated flip-flop and appears at the output after the positive transition of the clock input (CP). During parallel loading serial data flow is inhibited. Shift left and shift right are accomplished synchronously on the positive clock edge with serial data entered at the shift left (DSL) serial input for the shift right mode, and at the shift right (DSR) serial input for the shift left mode. Clearing the register is accomplished by a Low applied to the Master Reset (MR)\ pin.