CD54HC4046A Series

High Speed CMOS Logic Phase-Locked-Loop with VCO

Catalog

High Speed CMOS Logic Phase-Locked-Loop with VCO

Part	Output	Number of Circuits	Multiplier	Divider	Package Name	PLL	Voltage - Supply (Minimum)	Voltage - Supply (Maximum)	Mounting Type	Frequency - Max	Operating Temperature (Max)	Operating Temperature (Min)	Differential Output	Differential Input	Type	Input	Input Ratio	Output Ratio	Package Width	Package Length
Texas Instruments CD54HC4046AF3A	CMOS	1	No	No	16-CDIP	Yes	2 V	6 V	Through Hole	38 MHz	125 °C	-55 °C	No	No	Phase Lock Loop (PLL)	CMOS	1	4	7.62 mm	0.3 in
Texas Instruments CD54HC4046AF	CMOS	1	No	No	16-CDIP	Yes	2 V	6 V	Through Hole	38 MHz	125 °C	-55 °C	No	No	Phase Lock Loop (PLL)	CMOS	1	4	7.62 mm	0.3 in

Catalog

High Speed CMOS Logic Phase-Locked-Loop with VCO

Description

The ’HC4046A and ’HCT4046A are high-speed silicon-gate CMOS devices that are pin compatible with the CD4046B of the "4000B" series. They are specified in compliance with JEDEC standard number 7. The ’HC4046A and ’HCT4046A are phase-locked-loop circuits that contain a linear voltage-controlled oscillator (VCO) and three different phase comparators (PC1, PC2 and PC3). A signal input and a comparator input are common to each comparator. The signal input can be directly coupled to large voltage signals, or indirectly coupled (with a series capacitor) to small voltage signals. A self-bias input circuit keeps small voltage signals within the linear region of the input amplifiers. With a passive low-pass filter, the 4046A forms a second-order loop PLL. The excellent VCO linearity is achieved by the use of linear op-amp techniques. The ’HC4046A and ’HCT4046A are high-speed silicon-gate CMOS devices that are pin compatible with the CD4046B of the "4000B" series. They are specified in compliance with JEDEC standard number 7. The ’HC4046A and ’HCT4046A are phase-locked-loop circuits that contain a linear voltage-controlled oscillator (VCO) and three different phase comparators (PC1, PC2 and PC3). A signal input and a comparator input are common to each comparator. The signal input can be directly coupled to large voltage signals, or indirectly coupled (with a series capacitor) to small voltage signals. A self-bias input circuit keeps small voltage signals within the linear region of the input amplifiers. With a passive low-pass filter, the 4046A forms a second-order loop PLL. The excellent VCO linearity is achieved by the use of linear op-amp techniques.