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74LVC2G126 Series

2-ch, 1.65-V to 5.5-V buffers with 3-state outputs

Manufacturer: Texas Instruments

Catalog(7 parts)

PartCurrent - Output High, Low▲▼Current - Output High, Low▲▼Output TypeNumber of Elements▲▼Mounting TypeOperating Temperature▲▼Operating Temperature▲▼Number of Bits per Element▲▼Voltage - Supply▲▼Voltage - Supply▲▼Logic TypePackage / Case▲▼Package / CasePackage / Case▲▼Supplier Device Package
Texas Instruments
SN74LVC2G126DCUR
Buffer, Non-Inverting 2 Element 1 Bit per Element 3-State Output 8-VSSOP
0.03200000151991844 A
0.03200000151991844 A
3-State
2 ul
Surface Mount
-40 °C
125 °C
1 ul
5.5 V
1.649999976158142 V
Buffer, Non-Inverting
0.002311399905011058 m
8-VFSOP
0.002300000051036477 m
Texas Instruments
SN74LVC2G126DCTR
Buffer, Non-Inverting 2 Element 1 Bit per Element 3-State Output SM8
0.03200000151991844 A
0.03200000151991844 A
3-State
2 ul
Surface Mount
-40 °C
125 °C
1 ul
5.5 V
1.649999976158142 V
Buffer, Non-Inverting
SM8
Texas Instruments
74LVC2G126DCUTG4
Buffer, Non-Inverting 2 Element 1 Bit per Element 3-State Output 8-VSSOP
0.03200000151991844 A
0.03200000151991844 A
3-State
2 ul
Surface Mount
-40 °C
125 °C
1 ul
5.5 V
1.649999976158142 V
Buffer, Non-Inverting
0.002311399905011058 m
8-VFSOP
0.002300000051036477 m
Texas Instruments
SN74LVC2G126YZAR
Buffer, Non-Inverting 2 Element 1 Bit per Element 3-State Output 8-DSBGA (1.9x0.9)
0.03200000151991844 A
0.03200000151991844 A
3-State
2 ul
Surface Mount
-40 °C
125 °C
1 ul
5.5 V
1.649999976158142 V
Buffer, Non-Inverting
8-XFBGA, DSBGA
8-DSBGA (1.9x0.9)
Texas Instruments
SN74LVC2G126YEPR
Buffer, Non-Inverting 2 Element 1 Bit per Element 3-State Output 8-DSBGA (1.9x0.9)
0.03200000151991844 A
0.03200000151991844 A
3-State
2 ul
Surface Mount
-40 °C
125 °C
1 ul
5.5 V
1.649999976158142 V
Buffer, Non-Inverting
8-XFBGA, DSBGA
8-DSBGA (1.9x0.9)
Texas Instruments
SN74LVC2G126DCUT
Buffer, Non-Inverting 2 Element 1 Bit per Element 3-State Output 8-VSSOP
0.03200000151991844 A
0.03200000151991844 A
3-State
2 ul
Surface Mount
-40 °C
125 °C
1 ul
5.5 V
1.649999976158142 V
Buffer, Non-Inverting
0.002311399905011058 m
8-VFSOP
0.002300000051036477 m
Texas Instruments
74LVC2G126DCUTE4
Buffer, Non-Inverting 2 Element 1 Bit per Element 3-State Output 8-VSSOP
0.03200000151991844 A
0.03200000151991844 A
3-State
2 ul
Surface Mount
-40 °C
125 °C
1 ul
5.5 V
1.649999976158142 V
Buffer, Non-Inverting
0.002311399905011058 m
8-VFSOP
0.002300000051036477 m

Key Features

• Available in the Texas Instruments NanoFree™ PackageSupports 5-V VCCOperationInputs Accept Voltages to 5.5 VMax tpdof 4ns at 3.3VLow Power Consumption, 10-µA Max ICC±24-mA Output Drive at 3.3 VTypical VOLP(Output Ground Bounce) < 0.8 V at VCC= 3.3 V, TA= 25°CTypical VOHV(Output VOH Undershoot) > 2 V at VCC= 3.3 V, TA= 25°CIoffSupports Live Insertion, Partial-Power-Down Mode, and Back-Drive ProtectionCan Be Used as a Down Translator to Translate Inputs From a Max of 5.5 V Down to the VCCLevelLatch-Up Performance Exceeds 100 mA Per JESD 78, Class IIESD Protection Exceeds JESD 222000-V Human-Body Model1000-V Charged-Device ModelAvailable in the Texas Instruments NanoFree™ PackageSupports 5-V VCCOperationInputs Accept Voltages to 5.5 VMax tpdof 4ns at 3.3VLow Power Consumption, 10-µA Max ICC±24-mA Output Drive at 3.3 VTypical VOLP(Output Ground Bounce) < 0.8 V at VCC= 3.3 V, TA= 25°CTypical VOHV(Output VOH Undershoot) > 2 V at VCC= 3.3 V, TA= 25°CIoffSupports Live Insertion, Partial-Power-Down Mode, and Back-Drive ProtectionCan Be Used as a Down Translator to Translate Inputs From a Max of 5.5 V Down to the VCCLevelLatch-Up Performance Exceeds 100 mA Per JESD 78, Class IIESD Protection Exceeds JESD 222000-V Human-Body Model1000-V Charged-Device Model

Description

AI
These bus transceivers are designed for 1.65-V to 3.6-V VCCoperation. The SN74LVC2G126 device is a dual line driver with 3-state output. The output is disabled when the output-enable input is low. These bus transceivers are designed for 1.65-V to 3.6-V VCCoperation. The SN74LVC2G126 device is a dual line driver with 3-state output. The output is disabled when the output-enable input is low.