Catalog(2 parts)
| Part | Max Propagation Delay @ V, Max CL▲▼ | Clock Frequency▲▼ | Number of Bits per Element▲▼ | Trigger Type | Mounting Type | Operating Temperature▲▼ | Operating Temperature▲▼ | Package / Case | Supplier Device Package | Voltage - Supply▲▼ | Voltage - Supply▲▼ | Current - Output High, Low▲▼ | Current - Output High, Low▲▼ | Current - Quiescent (Iq)▲▼ | Number of Elements▲▼ | Type | Output Type | Package / Case▲▼ |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Texas Instruments SN74F174ANSRFlip Flop 1 Element D-Type 6 Bit Positive Edge 16-SOIC (0.209", 5.30mm Width) | 9.99999993922529e-9 s | 140000000 Hz | 6 ul | Positive Edge | Surface Mount | 70 °C | 0 °C | 16-SOIC (0.209", 5.30mm Width) | 16-SO | 5.5 V | 4.5 V | 0.019999999552965164 A | 0.0010000000474974513 A | 0.04500000178813934 A | 1 ul | D-Type | Non-Inverted | |
Texas Instruments SN74F174ADRE4Flip Flop 1 Element D-Type 6 Bit Positive Edge 16-SOIC (0.154", 3.90mm Width) | 9.99999993922529e-9 s | 140000000 Hz | 6 ul | Positive Edge | Surface Mount | 70 °C | 0 °C | 16-SOIC | 16-SOIC | 5.5 V | 4.5 V | 0.019999999552965164 A | 0.0010000000474974513 A | 0.04500000178813934 A | 1 ul | D-Type | Non-Inverted | 0.003911599982529879 m, 3.900000095367432 ul |
Key Features
• Contains Six Flip-Flops With Single-Rail OutputsBuffered Clock and Direct Clear InputsApplications Include:Buffer/Storage RegistersShift RegistersPattern GeneratorsFully Buffered Outputs for Maximum Isolation From External DisturbancesPackage Options Include Plastic Small-Outline Packages and Standard Plastic 300-mil DIPsContains Six Flip-Flops With Single-Rail OutputsBuffered Clock and Direct Clear InputsApplications Include:Buffer/Storage RegistersShift RegistersPattern GeneratorsFully Buffered Outputs for Maximum Isolation From External DisturbancesPackage Options Include Plastic Small-Outline Packages and Standard Plastic 300-mil DIPs
Description
AI
This monolithic, positive-edge-triggered flip-flop utilizes TTL circuitry to implement D-type flip-flop logic with a direct clear () input. Information at the data (D) inputs meeting the setup time requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When the clock (CLK) input is at either the high or low level, the D-input signal has no effect at the output.
The SN74F174A is characterized for operation from 0°C to 70°C.
This monolithic, positive-edge-triggered flip-flop utilizes TTL circuitry to implement D-type flip-flop logic with a direct clear () input. Information at the data (D) inputs meeting the setup time requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When the clock (CLK) input is at either the high or low level, the D-input signal has no effect at the output.
The SN74F174A is characterized for operation from 0°C to 70°C.