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CLVTH16373 Series

Enhanced Product 3.3-V Abt 16-Bit Transparent D-Type Latches With 3-State Outputs

Manufacturer: Texas Instruments
Link to Manufacturer Page: https://www.ti.com/

Catalog

Enhanced Product 3.3-V Abt 16-Bit Transparent D-Type Latches With 3-State Outputs

PartCircuitVoltage - Supply [Min]Voltage - Supply [Max]Logic TypeMounting TypePackage / Case [y]Package / CasePackage / CaseOutput TypeCurrent - Output High, LowDelay Time - PropagationSupplier Device PackageIndependent CircuitsOperating Temperature [Min]Operating Temperature [Max]
Texas Instruments
CLVTH16373IDGGREP
8:8
2.7 V
3.6 V
D-Type Transparent Latch
Surface Mount
6.1 mm
48-TFSOP
0.24 in
Tri-State
32 mA, 64 mA
2.9 ns
48-TSSOP
2
-40 °C
85 °C
Texas Instruments
CLVTH16373MGQLREP
8:8
2.7 V
3.6 V
D-Type Transparent Latch
Surface Mount
56-VFBGA
Tri-State
32 mA, 64 mA
2.9 ns
56-BGA Microstar Junior (7x4.5)
2
-55 °C
125 °C

Key Features

Controlled BaselineOne Assembly/Test Site, One Fabrication SiteEnhanced Diminishing Manufacturing Sources(DMS) SupportEnhanced Product-Change NotificationQualification Pedigree(1)Member of the Texas Instruments Widebus™ FamilyState-of-the-Art Advanced BiCMOS Technology(ABT) Design for 3.3-V Operation and Low Static-Power DissipationSupports Mixed-Mode Signal Operation (5-V Inputand Output Voltages With 3.3-V VCC)Supports Unregulated Battery Operation Down to2.7 VTypical VOLP(Output Ground Bounce) < 0.8 Vat VCC= 3.3 V, TA= 25°CIoffand Power-Up Tri-State Support Hot InsertionBus Hold on Data Inputs Eliminates the Need forExternal Pullup/Pulldown ResistorsDistributed VCCand GND Pins Minimize High-Speed Switching NoiseFlow-Through Architecture Optimizes PCB LayoutLatch-Up Performance Exceeds 500 mA PerJESD 17ESD Protection Exceeds JESD 224000-V Human Body Model (A114-A)200-V Machine Model (A115-A)Controlled BaselineOne Assembly/Test Site, One Fabrication SiteEnhanced Diminishing Manufacturing Sources(DMS) SupportEnhanced Product-Change NotificationQualification Pedigree(1)Member of the Texas Instruments Widebus™ FamilyState-of-the-Art Advanced BiCMOS Technology(ABT) Design for 3.3-V Operation and Low Static-Power DissipationSupports Mixed-Mode Signal Operation (5-V Inputand Output Voltages With 3.3-V VCC)Supports Unregulated Battery Operation Down to2.7 VTypical VOLP(Output Ground Bounce) < 0.8 Vat VCC= 3.3 V, TA= 25°CIoffand Power-Up Tri-State Support Hot InsertionBus Hold on Data Inputs Eliminates the Need forExternal Pullup/Pulldown ResistorsDistributed VCCand GND Pins Minimize High-Speed Switching NoiseFlow-Through Architecture Optimizes PCB LayoutLatch-Up Performance Exceeds 500 mA PerJESD 17ESD Protection Exceeds JESD 224000-V Human Body Model (A114-A)200-V Machine Model (A115-A)

Description

AI
The SN74LVTH16373 is a 16-bit transparent D-type latch with tri-state outputs designed for low-voltage (3.3 V) VCCoperation, but with the capability to provide a TTL interface to a 5-V system environment. This device is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. This device can be used as two 8-bit latches or one 16-bit latch. When the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the levels set up at the D inputs. The SN74LVTH16373 is a 16-bit transparent D-type latch with tri-state outputs designed for low-voltage (3.3 V) VCCoperation, but with the capability to provide a TTL interface to a 5-V system environment. This device is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. This device can be used as two 8-bit latches or one 16-bit latch. When the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the levels set up at the D inputs.