74ALVCH162374 Series
16-Bit Edge-Triggered D-Type Flip-Flop With 3-State Outputs
Manufacturer: Texas Instruments
Catalog(1 parts)
| Part | Type | Clock Frequency▲▼ | Number of Bits per Element▲▼ | Number of Elements▲▼ | Output Type | Function | Operating Temperature▲▼ | Operating Temperature▲▼ | Supplier Device Package | Max Propagation Delay @ V, Max CL▲▼ | Package / Case▲▼ | Package / Case | Package / Case▲▼ | Voltage - Supply▲▼ | Voltage - Supply▲▼ | Current - Output High, Low▲▼ | Current - Output High, Low▲▼ | Trigger Type | Input Capacitance▲▼ | Mounting Type |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Texas Instruments SN74ALVCH162374GRFlip Flop 2 Element D-Type 8 Bit Positive Edge 48-TFSOP (0.240", 6.10mm Width) | D-Type | 150000000 Hz | 8 ul | 2 ul | Tri-State, Non-Inverted | Standard | 85 °C | -40 °C | 48-TSSOP | 4.599999936516497e-9 s | 0.006099999882280827 m | 48-TFSOP | 0.006095999851822853 m | 3.5999999046325684 V | 1.649999976158142 V | 0.012000000104308128 A | 0.012000000104308128 A | Positive Edge | 2.9999999880125916e-12 F | Surface Mount |
Key Features
• Member of the Texas Instruments Widebus™ FamilyBus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown ResistorsOutput Ports Have Equivalent 26-Series Resistors, So No External Resistors Are RequiredLatch-Up Performance Exceeds 250 mA Per JESD 17ESD Protection Exceeds JESD 222000-V Human-Body Model (A114-A)200-V Machine Model (A115-A)Widebus is a trademark of Texas Instruments.Member of the Texas Instruments Widebus™ FamilyBus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown ResistorsOutput Ports Have Equivalent 26-Series Resistors, So No External Resistors Are RequiredLatch-Up Performance Exceeds 250 mA Per JESD 17ESD Protection Exceeds JESD 222000-V Human-Body Model (A114-A)200-V Machine Model (A115-A)Widebus is a trademark of Texas Instruments.
Description
AI
This 16-bit edge-triggered D-type flip-flop is designed for 1.65-V to 3.6-V VCCoperation.
The SN74ALVCH162374 is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. It can be used as two 8-bit flip-flops or one 16-bit flip-flop. On the positive transition of the clock (CLK) input, the Q outputs of the flip-flop take on the logic levels set up at the data (D) inputs.
The output-enable (OE)\ input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus lines without need for interface or pullup components. OE\ does not affect internal operations of the flip-flop. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.
The outputs, which are designed to sink up to 12 mA, include equivalent 26-resistors to reduce overshoot and undershoot.
To ensure the high-impedance state during power up or power down, OE\ should be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.
This 16-bit edge-triggered D-type flip-flop is designed for 1.65-V to 3.6-V VCCoperation.
The SN74ALVCH162374 is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. It can be used as two 8-bit flip-flops or one 16-bit flip-flop. On the positive transition of the clock (CLK) input, the Q outputs of the flip-flop take on the logic levels set up at the data (D) inputs.
The output-enable (OE)\ input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus lines without need for interface or pullup components. OE\ does not affect internal operations of the flip-flop. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.
The outputs, which are designed to sink up to 12 mA, include equivalent 26-resistors to reduce overshoot and undershoot.
To ensure the high-impedance state during power up or power down, OE\ should be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.