74LVTH126 Series
4-ch, 2.7-V to 3.6-V buffers with bus-hold, TTL-compatible CMOS inputs and 3-state outputs
Manufacturer: Texas Instruments
Catalog(5 parts)
| Part | Package / Case▲▼ | Package / Case▲▼ | Package / Case | Output Type | Number of Elements▲▼ | Mounting Type | Voltage - Supply▲▼ | Voltage - Supply▲▼ | Number of Bits per Element▲▼ | Operating Temperature▲▼ | Operating Temperature▲▼ | Current - Output High, Low▲▼ | Logic Type | Supplier Device Package | Package / Case▲▼ | Package / Case▲▼ | Package / Case▲▼ |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Texas Instruments SN74LVTH126DRBuffer, Non-Inverting 4 Element 1 Bit per Element 3-State Output 14-SOIC | 0.003899999894201755 m | 0.003911599982529879 m | 14-SOIC | 3-State | 4 ul | Surface Mount | 2.700000047683716 V | 3.5999999046325684 V | 1 ul | 85 °C | -40 °C | 0.03200000151991844 A, 0.06400000303983688 A | Buffer, Non-Inverting | ||||
Texas Instruments SN74LVTH126DBRBuffer, Non-Inverting 4 Element 1 Bit per Element 3-State Output 14-SSOP | 0.0052999998442828655 m | 14-SSOP | 3-State | 4 ul | Surface Mount | 2.700000047683716 V | 3.5999999046325684 V | 1 ul | 85 °C | -40 °C | 0.03200000151991844 A, 0.06400000303983688 A | Buffer, Non-Inverting | 14-SSOP | 0.005308600142598152 m | |||
Texas Instruments SN74LVTH126DGVRBuffer, Non-Inverting 4 Element 1 Bit per Element 3-State Output 14-TVSOP | 14-TFSOP | 3-State | 4 ul | Surface Mount | 2.700000047683716 V | 3.5999999046325684 V | 1 ul | 85 °C | -40 °C | 0.03200000151991844 A, 0.06400000303983688 A | Buffer, Non-Inverting | 0.004399999976158142 m | |||||
Texas Instruments SN74LVTH126PWRBuffer, Non-Inverting 4 Element 1 Bit per Element 3-State Output 14-TSSOP | 14-TSSOP | 3-State | 4 ul | Surface Mount | 2.700000047683716 V | 3.5999999046325684 V | 1 ul | 85 °C | -40 °C | 0.03200000151991844 A, 0.06400000303983688 A | Buffer, Non-Inverting | 14-TSSOP | 0.004394200164824724 m | 0.004399999976158142 m | |||
Texas Instruments SN74LVTH126DBuffer, Non-Inverting 4 Element 1 Bit per Element 3-State Output 14-SOIC | 0.003899999894201755 m | 0.003911599982529879 m | 14-SOIC | 3-State | 4 ul | Surface Mount | 2.700000047683716 V | 3.5999999046325684 V | 1 ul | 85 °C | -40 °C | 0.03200000151991844 A, 0.06400000303983688 A | Buffer, Non-Inverting |
Key Features
• Support Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V VCC)Support Unregulated Battery Operation Down to 2.7 VTypical VOLP(Output Ground Bounce)<0.8 V at VCC= 3.3 V, TA= 25°CIoffand Power-Up 3-State Support Hot InsertionBus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown ResistorsLatch-Up Performance Exceeds 100 mA Per JESD 78, Class IIESD Protection Exceeds JESD 222000-V Human-Body Model (A114-A)200-V Machine Model (A115-A)1000-V Charged-Device Model (C101)Support Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V VCC)Support Unregulated Battery Operation Down to 2.7 VTypical VOLP(Output Ground Bounce)<0.8 V at VCC= 3.3 V, TA= 25°CIoffand Power-Up 3-State Support Hot InsertionBus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown ResistorsLatch-Up Performance Exceeds 100 mA Per JESD 78, Class IIESD Protection Exceeds JESD 222000-V Human-Body Model (A114-A)200-V Machine Model (A115-A)1000-V Charged-Device Model (C101)
Description
AI
These bus buffers are designed specifically for low-voltage (3.3-V) VCCoperation, but with the capability to provide a TTL interface to a 5-V system environment.
The ’LVTH126 devices feature independent line drivers with 3-state outputs. Each output is in the high-impedance state when the associated output-enable (OE) input is low.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.
When VCCis between 0 and 1.5 V, the device is in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 1.5 V, OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.
These devices are fully specified for hot-insertion applications using Ioffand power-up 3-state. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict.
These bus buffers are designed specifically for low-voltage (3.3-V) VCCoperation, but with the capability to provide a TTL interface to a 5-V system environment.
The ’LVTH126 devices feature independent line drivers with 3-state outputs. Each output is in the high-impedance state when the associated output-enable (OE) input is low.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.
When VCCis between 0 and 1.5 V, the device is in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 1.5 V, OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.
These devices are fully specified for hot-insertion applications using Ioffand power-up 3-state. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict.